The Sinclair QL Forum

Hi,

Can you write an updated 68000 CPU?

Brane2 wrote: BTW, is there a link to other parts that he refers to in this article ?
Namely, it would be nice to know what exactly happens during exception processing.

Exception processing timings are at the end of the document and the external references are defined in the Foreword section. US Patent 4325121 is here: https://patft.uspto.gov/netacgi/nph-Par ... 4325121.PN. It describes a preliminary version of the CPU, close to the final one, but not a 100% match. The tables in fx68k should be more accurate, I think they are derived from the microscope images.

Useless trivia: Interrupt 2 on the QL asserts the VPA signal. This has the side effect of slowing down by ten times up to two instructions before the interrupt is serviced.

Brane2 wrote:8-bit faggotry

Is this a new technical term that I'm not aware of?

Cheers,
Norm.

A 3 minute academic video that details all the new technical terms can be found as follows:-
https://www.youtube.com/watch?v=02a723LsoFA