Faster/wider CPU...

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Dave
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Re: Faster/wider CPU...

Postby Dave » Fri Feb 17, 2012 12:59 am

They have s/w for Windows and Linux - I use OS X. I have a headless linux webserver or 20, but they're headless...


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Re: Faster/wider CPU...

Postby Brane2 » Fri Feb 17, 2012 1:22 am

So, that's the limit.

But I still don't know all the details.

Basically, it boils down to this:

- if you stay stuck with 74xx, you might complete something, but it won't be worth copying and using, so practically no one will contribute the code that could make it more useful

- if you wish to do anything, worth even mentioning, you'll have to go with programmable logic somewhere. For that, you'll need to use SW.

- AFAIK there is no good, accessible PCB design software nor FPGA/CPLD development kits for OSX, so you will have to get yourself some WinBox or a head for at least one of your headless servers..


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Re: Faster/wider CPU...

Postby Brane2 » Fri Feb 17, 2012 1:42 am

If you need help with Linux, ask.

But I will _definitelly_ need you to loosen up with info instead of having to painfully pull out of you one detail at the time. :mrgreen:


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Re: Faster/wider CPU...

Postby dilwyn » Fri Feb 17, 2012 1:20 pm

All this discussion has been a bit beyond me too, but is still interesting nonetheless.

I guess some people will be interested in new super gold card type (albeit much more modern) of plug-in expansion for QL, some people would be interested in an enhanced motherboard type solution, some in the FPGA-system as dicussed and some in any other even more advanced proposal, as long as reasonably affordable. The Q40 and Q60 machines were great at the time, but expensive.

For one, I just hope Peter Graf manages to get his FPGA system going despite the issues he's had with an OS for it.

I'm also interested in what Mr Navigator has been saying about using the RaspberryPi for example. I liked the idea of adding the keyboard he saw on Amazon to the QL case, RPi innards running a QL emulator. Gives one possible two-in-one machine solution to all this for those who prefer Linux and gives a means of using the QL case for those who'd like to keep it for Nastalgia and appearance's sake.

With an RPi inside a QL case it would be pretty self-contained and all the connectors could be neatly round the back, so you'd only have the monitor, RPI-QL (or whatever it got called) and any other plug-in bits. Probably not progress in the true sense of the word but a neat little combined Linux+QL solution.

Personally I use a Windows 7 PC with QPC2 and I am happy with that system for all my needs at present. I don't have much room in the house for other systems, but might at some point be interested in learning Linux, so the idea of putting a RPi in an old QL case with better (more suitable) keyboard for Linux and a QL emulator such as uQLx or even the Linux QLay as a second (learn Linux) machine. Using the QL case would probably be pure nostalgia I guess, it'd probably be easier to put the RPi into some PC keyboards.

Everyone has their own ideas for what's best and although the discussion gets a little heated occasionally, floating new ideas of all sorts is always good. If just one or two ideas come to something it's good.

Dilwyn


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Re: Faster/wider CPU...

Postby Dave » Fri Feb 17, 2012 9:10 pm

I'm all for people expressing their ideas to me. I'm just resistant to people telling me my ideas are wrong/incorrect/non-optimal when I said up-front that I wasn't trying to do an optimal project, but one that can most easily be completed.

As soon as "ability to complete" enters the equation as a major factor, it changes everything.

Maybe I should start with a much simpler project, as has been suggested. I could do a simple 512K SRAM expansion that is a very low power three chip design. Just need to remember everything I learned back in 84 about the address decoder in the 512K expansion we did then ;)


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Re: Faster/wider CPU...

Postby Brane2 » Sat Feb 18, 2012 3:07 am

This thread is getting philosophical. I would love to be able to to explain my views on the world, but it would be too long, tedious and above all, off-topic, so, in short version:

Dave wrote:I'm all for people expressing their ideas to me. I'm just resistant to people telling me my ideas are wrong/incorrect/non-optimal when I said up-front that I wasn't trying to do an optimal project, but one that can most easily be completed.


1. I always tried to honour your stated barriers. And searched for solutions within them. YOu wanted to work with 74.. and I foud you a solution that is practically equivalent. If you can solder up 74.. chips together, it stands to reason that you can also wire them up in schematic. After all, you usually do your board after you have drawn a schematic. From my viewpoint, it fits the "don't push me to learn much outside 74.." ideally.

Even more than that. Within your solution, you could make a final version that just works and then someone could take it over from there and write more advanced code for the same chips, and significantly speed-up the same board.

But you kept refusing and I kept asking for new data that would justify that.

2. Whenever I asked "why", you seem to understood my position somewhat as:

What a pathetic looser. MORON. Who uses 74.. today besides idiots ? < insert your favorite anti-american slogan here >


while what I really meant was:

By using your stated starting conditions and boundaries, this should be near-optimal solution. You obviosly disagree. So something is wrong here. Either my logic here was false or starting conditions and premises that you gave me are false and/or incomplete. I can retrace my logic, but i really need you to look at things from your side (= give me your perspective) so i can use difference in views to find the error.



So I asked "WHY" and everytime I asked, I've got response of the type "You can't ask that sort of questions in public!" :roll:


As soon as "ability to complete" enters the equation as a major factor, it changes everything.


Why ? Seeing how high can you jump is part of the fun. And failing. And by this i mean not occassionally, but _mainly_ failing . What part of the projects that were started in labs of your dear "uncle Clive", have really seen the finish line ? Whatever the number was, I am certain that it was miniscule percent. Do you think he and all his staff will end in Hell because their numerous project abortions ?
Live a little, FFS.

Here is YT link to interesting chick - Jerri Allison. Listen about what she had to say about failing:

http://www.youtube.com/watch?v=xhQ7d3BK3KQ&feature=fvsr ( If you can't open flash, it basically boils down to "Don't be afraid to fail and fail often. It's fundamental part of growth")


What's the worst possible fallout ? That you end up wasting $100 or not even that ? So what ? And I bet you that even then you'll end up making a big mental step forward in one way or another.
Last edited by Brane2 on Sat Feb 18, 2012 7:16 am, edited 7 times in total.


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Re: Faster/wider CPU...

Postby Brane2 » Sat Feb 18, 2012 3:16 am

And, forthe umpteenth time, I don't have any problem with you going 74.. or any other route.

Just change starting parameter to "going any other route than 74.. is not an option." as an stipulation.

Given in such way, my suggestion would fall off as a possible solution and that would be end of it.

Had you done that in the start, you probably might get a question or two from me about that, and possibly a suggestion to reevaluate it, but it would end at that.


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Re: Faster/wider CPU...

Postby MemoryLaneComputing » Sat Feb 18, 2012 10:27 am

dilwyn wrote:I'm also interested in what Mr Navigator has been saying about using the RaspberryPi for example. I liked the idea of adding the keyboard he saw on Amazon to the QL case, RPi innards running a QL emulator. Gives one possible two-in-one machine solution to all this for those who prefer Linux and gives a means of using the QL case for those who'd like to keep it for Nastalgia and appearance's sake.


This actually highlights a fundamental question about this whole thread. For the majority of people, an emulation solution, on whatever platform, is likely to be more efficient for anyone who has a need or desire to continue using QL software. If you take QPC2 or Q-emuLator and put them on even an entry level PC today, then you instantly get a QL with more than adequate performance for any likely task. If you think about it, QPC2 doesn't even really emulate a true QL, anyway - it's more of a "Virtual QL" that has moved on significantly from the original design.

It sort of gets you to asking the question "Why bother?" when discussing building new hardware. But I think there is a demand for new "real" hardware. It's mainly from the hard core hobbyists and enthusiasts, those people (and I number myself amongst them) who would like to see a new QL platform using some contemporary technology. Probably we're giving in to nostalgia, but it's a hobby, and it gives us enjoyment, so that's really the only justification needed to build something like this.

In my opinion, the only sensible route for such a project is to use an FPGA. That also gives you a significant degree of future proofing, allowing you to leverage the core on newer, faster devices. It also reduces hardware design and build costs and simplifies upgrading.

But Dave's ideas are also perfectly valid. If you have some hardware that you are familiar with and are comfortable with, then use it. I happen to like 74 series logic as well and using a "genuine" 68XXX chip (or derivative) is a good way of recreating the spirit of the 1980s home micro years.

There have been some comments made here about how simple it is to slap a schematic into a modelling tool and have it flash the resulting design into the target FPGA. Whether you use schematic modelling or a hardware description languages such as Verilog, I cannot agree that it is that simple, at least not for the project that we are discussing here. There are a lot of other things going on in that process, not the least of which being the synthesis stage which is largely invisible to the developer, yet can produce physical implementations that do not perform as your design intended. There can be a lot of work involved in sorting those issues out - and sometimes it really is easier to desolder a piece of hookup wire and move it one pin to the left :)

I hope there eventually will be a new "QL Redux". I believe it can and should be done, if for no other reason than it is an interesting and challenging project. But perhaps the real question that we should be asking is who is going to write all of the new software that will be needed to take full advantage of such a platform?


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Re: Faster/wider CPU...

Postby Brane2 » Sat Feb 18, 2012 12:49 pm

Waaay off topic, I know, but given that quite a few profi designers of custom logic read this, I have a question.

How do I convince Actel's Liberator to start on such system ? They have Linux version, but it is for RedHat something.

I use Gentoo Linux. 64-bit version, CPU is AMD Phenom 955BE. It is reasonably fresh system ( not many unstable packages, they are exceptions)

- kernel gentoo-sources-3.10-r1 ( latest 3.1)
- glibc-2.13

Has anyone managed to get Liberator-9.1 running on such system ? :)


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Re: Faster/wider CPU...

Postby twellys » Mon Feb 20, 2012 2:48 pm

Although there is probably a critical mass for a 'QL Redux' in hardware (MemoryLane, Peter, PPE, Dave, et al.), I'm not sure there is enough people to rewrite the OS and produce some software that shows off the new features.

Adrian / Peter / PPE - Willing to test / debug new / updated hardware for you. Unfortunately, I'm a contractor at present and home for a weekend in two weeks.

Dave - I'm splitting hairs, but you could have a virtual machine running RHEL/CentOS on your OS X - My former boss did.

Brane2 - The CoolrunnerII would be better - more obsolence proof than XL9500 - ready in a starter-kit for $59 - all you need is some cheap as a chips voltage conversion buffers.
- Most of the EDA software expects a Linux version of 2.4/2.6 - I know Linus changed the version number to 3.* but most of EDA software still wants 2.4/2.6 - Latest version of RHEL/CentOS is only 2.6.32.

Cheers,
T.
(15 years in FPGAs/ASICs development)



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