Asymmetric multiprocessing...

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Dave
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Asymmetric multiprocessing...

Postby Dave » Tue May 14, 2019 4:49 pm

First a disclaimer: this came out of a JOKE on the QL Forum IRC yesterday. I slept on it and want to float it here, just because it is an interesting idea.


It is possible to connect secondary processors of different architectures to the QL.

In this example, a Z80 or 6502 is connected to the A port of a 64K dual port SRAM. The B port is mapped on the QL. The QL can write a ROM image into the SRAM and reset the CPU to launch it with that OS. The CPU can do all the things it would do with that 64K as though it were a full computer, and the QL side would "just" need to know how the alternate system operated. It could then do proxy keyboard input, etc. It's even possible to map some of the DPRAM to the IO area so the guest CPU could access IO directly, if some kind of interrupt/halt mechanism is constructed.

We found this quite an amusing idea, although we couldn't immediately think of any practical uses for it!

So, if you could have any real world second CPU, what would it be and what would you do with it?

What's POSSIBLE?


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Pr0f
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Re: Asymmetric multiprocessing...

Postby Pr0f » Tue May 14, 2019 5:17 pm

If memory serves me well, there used to be just such a system with a Z80 using the QL as just an I/O server and running CPM - it was a plug in expansion card...


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Re: Asymmetric multiprocessing...

Postby Dave » Tue May 14, 2019 6:06 pm

That sounds like a blast. Does anyone have any info on the hardware and supporting software? I've never seen or heard of this, though I had heard CP/M ran "on the QL"...


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Re: Asymmetric multiprocessing...

Postby Dave » Tue May 14, 2019 6:47 pm

Quest CP/M was CP/M-68 which ran natively on the 68000. While it did have hardware, that hardware didn't have a CPU.


Ok, so let's take CP/M as a given.

What else could be done with asymmetric processing?


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Re: Asymmetric multiprocessing...

Postby tofro » Tue May 14, 2019 7:03 pm

Here's a guy in Russia that boots a ROM-less 68008 from an AVR by feeding single bytes from the AVR to the 68008's data bus during the reset cycle....

Tobias


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Dave
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Re: Asymmetric multiprocessing...

Postby Dave » Tue May 14, 2019 7:30 pm

Here's a challenge: Write a complete OS that can fit, with useful programs, just inside the CPU's cache. Obviously, this would require a 68030 or greater.

So far we have (including IRC discussion and computer lab discussion:

A 6502 and Beeb tube implementation
80486DX and run Windows 3.1 in a window on the QL? RiscPC style!
ATmega, and the variety of IO/datalogging it could provide.
A large FPGA as the ultimate dev board that can be anything you want.
Transputers.... because transputers!
Turning the QL into the 2nd CPU and plugging it into a RiscPC.


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Dave
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Re: Asymmetric multiprocessing...

Postby Dave » Tue May 14, 2019 7:56 pm

I read the QL World article (May 1985, page 46?) and it was never released. Only demonstrated.

I guess they never figured out a way around Digital's $15/unit up front license fee.


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Re: Asymmetric multiprocessing...

Postby NormanDunbar » Tue May 14, 2019 8:30 pm

Dave wrote:Transputers.... because transputers!


No other reason required! I thought I was the only person who got excited by Transputers.


Cheers,
Norm.


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