Im guessing there is no-one left with the financial clout to sue someone in RussiaPeter wrote: How about the recent GoldCard clones then?
Gold Card / Super Gold Card ROM patching...
- XorA
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Re: Gold Card / Super Gold Card ROM patching...
Re: Gold Card / Super Gold Card ROM patching...
I thought I would share my findings - thanks to Jan to show what the Gold/Super Gold actually do to the Minerva code in terms of patching:
85-87 modifies Trap #1 to point into 01C4CC
191 modifies RESET instruction ino a STOP instruction
1068 - modifies setup code in init to jsr to 01CF94 (was LEA for 18020 reg)
444E - Formt - tst.b is modified to be a jump to 01CA32
45AE - SEDES md_selc - MOVEQ is modified to be a jump to 01CD62
45B4 - SEDES md_desekc - MOVEQ is modified to be a jump to 01CD5E
468D - MD_SERVE - documented in minerva src - modifies addq.b #2,d1 to addq.w #2,d1
46CA - MD_SERVE - documented in minerva src - modifies add.w d1,a4 to add.l d1,a4
47B9 - MD_READ - md_sectr JSR replaced with jump to 01CC30
47D8 - MD_READ - md_read LEA replaced with jump to 01CC52
47DE - MD_READ - md_verin LEA replaced with jump to 01CC58
488A - MD_WRITE - md_write MOVE.B replaced with jump to 01CBD2
AEDE - I2C - ii_drive replaced with jump to 01CDCE
AEE6 - I2C - ii_raw replaced with jump to 01CDD6
So that deals with the Microdrive and I2C timing critical code, so I am guessing that Serial transmission and Networking are handled through driver replacements?
Perhaps a Christmas holiday project to disassemble the Gold card ROM sections - certainly now I have some entry points to look into.
85-87 modifies Trap #1 to point into 01C4CC
191 modifies RESET instruction ino a STOP instruction
1068 - modifies setup code in init to jsr to 01CF94 (was LEA for 18020 reg)
444E - Formt - tst.b is modified to be a jump to 01CA32
45AE - SEDES md_selc - MOVEQ is modified to be a jump to 01CD62
45B4 - SEDES md_desekc - MOVEQ is modified to be a jump to 01CD5E
468D - MD_SERVE - documented in minerva src - modifies addq.b #2,d1 to addq.w #2,d1
46CA - MD_SERVE - documented in minerva src - modifies add.w d1,a4 to add.l d1,a4
47B9 - MD_READ - md_sectr JSR replaced with jump to 01CC30
47D8 - MD_READ - md_read LEA replaced with jump to 01CC52
47DE - MD_READ - md_verin LEA replaced with jump to 01CC58
488A - MD_WRITE - md_write MOVE.B replaced with jump to 01CBD2
AEDE - I2C - ii_drive replaced with jump to 01CDCE
AEE6 - I2C - ii_raw replaced with jump to 01CDD6
So that deals with the Microdrive and I2C timing critical code, so I am guessing that Serial transmission and Networking are handled through driver replacements?
Perhaps a Christmas holiday project to disassemble the Gold card ROM sections - certainly now I have some entry points to look into.
- janbredenbeek
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Re: Gold Card / Super Gold Card ROM patching...
Serial transmission is handled by hardware in the 8302. I'm not sure about the driver getting replaced.Pr0f wrote:I thought I would share my findings - thanks to Jan to show what the Gold/Super Gold actually do to the Minerva code in terms of patching:
(list skipped...)
So that deals with the Microdrive and I2C timing critical code, so I am guessing that Serial transmission and Networking are handled through driver replacements?
Networking is handled by software ('bit-banging') so the driver probably gets replaced (which occurs with a lot of drivers in TK2, which is incorporated in the GC ROM).
One interesting point would be the interrupt serving code in the ROM which handles MDV I/O, the GC ROM must patch this one way or another because of the different timings. From your list I gather the L2 interrupt vector hasn't been changed.
Well I expect my Q68 to arrive before Christmas, I guess for me this will be some other holiday's projectPerhaps a Christmas holiday project to disassemble the Gold card ROM sections - certainly now I have some entry points to look into.
Jan.
Re: Gold Card / Super Gold Card ROM patching...
That's only for reception - serial transmission is done by the CPU and is bit banged, using a couple of bits in one of the zx8302 registers.janbredenbeek wrote:Serial transmission is handled by hardware in the 8302. I'm not sure about the driver getting replaced.?
The Gold/Super Gold cards take the L2 interrupt from the QL bus, and that is raised by the ZX8302 for various conditions (serial data available, Microdrive data, IPC communications, and frame interrupt), the timing of this is effectively independent of CPU speed, as apart from the frame interrupt, these are asynchronous events. The Aurora goes to some trouble to ensure the approx. 50hz original vsync timing appears on the same line, so as not to upset this timing. The ZX8302 has 2 registers for to capture bytes from the MDV, so some of the timing burden is taken away from the CPU, so it doesn't have to look for edges.janbredenbeek wrote:One interesting point would be the interrupt serving code in the ROM which handles MDV I/O, the GC ROM must patch this one way or another because of the different timings. From your list I gather the L2 interrupt vector hasn't been changed.
Part of my goal in this was to determine how much is affected by the patching, and if replacement hardware dealt with some of the timing critical functions, what would a cpu accelerator actually need to deal with. Not that much in the grand scheme of things...
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Re: Gold Card / Super Gold Card ROM patching...
Hi PrOf
Just a slight correction...
M.
Just a slight correction...
Whilst quite a bit of preparation seems to take place before QDOS writes to the 8302 for SERial transmission, the actual transfer is byte orientated (to the 8bit pc_tdata register), not bit-banged per-se.Pr0f wrote:janbredenbeek wrote:serial transmission is done by the CPU and is bit banged, using a couple of bits in one of the zx8302 registers.
M.
Re: Gold Card / Super Gold Card ROM patching...
thank you for that info - I am still trying to understand all that the ZX8302 does, at first it seemed like not so much, but as you dig deeper and deeper it does have quite a bit to do. It just seems to be limited by so many compromises for cost
Re: Gold Card / Super Gold Card ROM patching...
Which raises the point that there may be a world market for a half dozen more Hermes. Given the nominal economic potential, it might be a nice Christmas present if the source of Hermes were released with any notes so people could possibly develop or embed it further? Then it could find a new life? I would be happy to pay a FRAND license fee for it.
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Re: Gold Card / Super Gold Card ROM patching...
Hermes or SuperHermes?Dave wrote:Which raises the point that there may be a world market for a half dozen more Hermes. Given the nominal economic potential, it might be a nice Christmas present if the source of Hermes were released with any notes so people could possibly develop or embed it further? Then it could find a new life? I would be happy to pay a FRAND license fee for it.
I have some Hermes in stock but Tony Firshman has been unable to make any new SuperHermes as he could not get the keyboard code to work for some reason
Rich Mellor
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Also Involved in:
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Re: Gold Card / Super Gold Card ROM patching...
Maybe an alternate replacement for the IPC? The disassembly for the original 8049 is available, and there is good documentation for the message passing between ipc trap and the ipc.Dave wrote:Which raises the point that there may be a world market for a half dozen more Hermes. Given the nominal economic potential, it might be a nice Christmas present if the source of Hermes were released with any notes so people could possibly develop or embed it further? Then it could find a new life? I would be happy to pay a FRAND license fee for it.
Re: Gold Card / Super Gold Card ROM patching...
All the more benefit to open it up once your existing stock is consumed. A lot of smart people in the community could possibly quickly provide extended serial capabilities, etc. which is one of the biggest advantages of updating the IPC.RWAP wrote:Hermes or SuperHermes?
I have some Hermes in stock but Tony Firshman has been unable to make any new SuperHermes as he could not get the keyboard code to work for some reason