Q68 netwrok port hardware

[FrancoisLanciault]

Hi,

There needs to be a switch on the connector

There is.

[FrancoisLanciault]

That's correct in inactive state (Bit 0 = 0). When you pull the line high, it should change.

It does. When I apply 3.3V to the QLnet pin, the value becomes 57.

Let's wait for the BAT43.

[Peter]

That's correct in inactive state (Bit 0 = 0). When you pull the line high, it should change.

It does. When I apply 3.3V to the QLnet pin, the value becomes 57.

Let's wait for the BAT43.

SInce your test proved that your Q68 FPGA has not been damaged, I would not expect much from replacing the diodes. Did you check their polarity, by the way?

[FrancoisLanciault]

It does. When I apply 3.3V to the QLnet pin, the value becomes 57.

Let's wait for the BAT43.

SInce your test proved that your Q68 FPGA has not been damaged, I would not expect much from replacing the diodes. Did you check their polarity, by the way?

Peter, I used Dave's schematic as found here https://www.qlforum.co.uk/viewtopic.php?f=3&t=2881&start=20#p28425

You can see my board and thus the diode orientation here https://www.qlforum.co.uk/viewtopic.php?f=20&t=3255&start=10#p33944

François

[Derek_Stewart]

Hi Francois,

Did you take the message by Dave into account with a bug in the circuit diagram you used

I will be uploading a slightly modified board later.

It fixes a bug where the termination resistors are wired incorrectly (the signal is wired to ground not the tip, and the termination resistor to the tip, not ground side of the switch. I discovered the switched 3.5mm jacks I bought have a different connector order to the unswitched ones.

It also adds .4mm extra clearance from the supercap, which is used for battery back-up. While contact doesn't present an electrical problem, the cap is quite exposed and I have to allow for the unlikely event one wasn't mounted perfectly straight.

In the mean time, please do not use the above gerbers.

Never seen updated Gerber files or solution.

You should check your circuit with the file supplied by Peter, supplied here for reference.

qlnet.pdf

Q68 QL NET connections details

(118.74 KiB) Downloaded 128 times

[Dave]

Sorry about that. Nobody seemed interested so I dropped the project.

[Derek_Stewart]

Sorry about that. Nobody seemed interested so I dropped the project.

I was interested, but was waiting on your corrections.

I would say by experience in the QL world, I think everyone is interested, but some do not say or express the interest.

Looks like I will have to do this myself.

[FrancoisLanciault]

Hi Francois,

Did you take the message by Dave into account with a bug in the circuit diagram you

...

You should check your circuit with the file supplied by Peter, supplied here for reference.
qlnet.pdf

My understanding was that the error was in the Gerber file, not in the schematics. I used Dave’s schematic, not the Gerber.

Also, I don’t see any differences between the schematic from Dave and the one from Peter.

If I am wrong, please let me know.

[Peter]

My understanding was that the error was in the Gerber file, not in the schematics. I used Dave’s schematic, not the Gerber.

The schematics from Dave are fine.

[Derek_Stewart]

Hi,

I thought the Gerber files were produced from the PCB file which is dependant on the Schematic. Maybe reasoning is wrong here.

If the schematic drawing is correct, the circuit is constructed as per the schematic and circuit design, the QL NET driver is correctly written, the Q68 is working correctly. I am not sure we're the problem is.

Did you connect the QL NET circuit to the Q68 expansion port correctly?

I maybe asking silly questions, I do not understand where the error is.