Extended expansion connector...

[Dave]

A proposal for an extension of the J1 expansion connector to three rows. The intent is for it to be backwards compatible with all traditional 64-pin expansion cards.

The purpose of the 96-pin expansion connector is:
* to increase address and data space for 32-bit CPUs by adding D8-D31 and A20,A21
* improve grounding
* to release some pins that were never used in any expansion: RED, GREEN, BLUE, VSYNC and CSYNC
* to retain full backwards compatibility

The version number of this proposal is currently V0.1

DISCLAIMER:

This proposal is based on my experience with 68008, 68000 and 68020 CPUs. Other CPUs may take advantage of different features. If you're aware of changes that would facilitate the widest range of CPUs, please let me know.

DISCUSSION:

This forum will be used for a consultation period lasting until February 28th 2014. After that, the resulting expansion will be considered defined. The standard will be under continual review, but any changes will be backwards compatible to ensure interoperability. All future expansions can optionally use the traditional DIN41612 2-row connector, or the expanded 3-row connector. This will be an open standard. If any party intends to make a motherboard or expansion that uses the new standard, they can use it royalty free and without obtaining consent. I, Dave Park, will maintain the standard, and will take requests for designation of available pins by mounting a discussion like this one, then adopting and revising the standard. Any reasonable proposal can be adopted after a 14 day consultation period in a public forum.

Video:
To my knowledge, the RED, GREEN, BLUE, VSYNC and HSYNC pins were never used on any mass-produced expansion. Because of their purpose, expansion cards neither tied these to ground or connected them in any way. Further, these lines introduce a lot of noise across the board. It is proposed to deprecate these tags, and to make a12 "A19" and b13 "A20" - thereby expanding the address range. If anyone knows of any reasonable objection, or benefit to address lines beyond A21 (4MB), please discuss below.

Additional lines:
Adding row C allows 32 extra pins. This allows the extension of DATA lines to encompass 32-bit CPUs. It also allows the expansion of the 68008's combined IPL0/2 to two separate lines, IPL0 and IPL2.

Two pairs of ground pins are provided in row c. This serves a dual purpose: the primary purpose is to allow improved grounding to expansions. The secondary purpose is that, by the addition of two jumpers, it is possible to prevent accidental wrong insertion of a 2-row card in a 3-row socket in the -BC position.

The provisional revised expansion connector is listed below. Changes are highlighted in green. Changes that generate discussion will be changed to yellow, and changes that create controversy will be highlighted in red.

v0.1

Changelog:
v0.1
Addition of A20 at a12 and A21 at b13
Addition of D8-D31 at c1-c8, c11-c26
Addition of /IPL2 at c29
Addition of regulated 5v at 1A max - max draw per card 350mA.
Deletion of b15-b18

Polite, constructive discussion leading to an enhanced connector only, please.

[Paul]

As the Video Monitor "Problem" has no Solution yet I would prefer not to drop these signals.
Of course you cannot override these signals, but you can scan those for a video grabber that makes VGA output, or if someone designs a 32 bit graphics card, there could be a fallback to the slow original modes given by the ULA.
So, if possible, I would very much prefer to keep the video signals.

Kind regards
Paul

[Peter]

I might add that I had actually considered designing a video converter chip using these signals. I was only hindered by lack of time and higher importance of other QL projects. Compared to a full video controller, using these signals does not require data and address lines, so there is much less 5V to 3.3V conversion.

I'm not sure how well such a converter would work on some QL, which have not a very stable video timing. Nevertheless, the output quality is potentially better than from multi-purpose converters, because sampling can be specialized for the QL. Of course, one could also use the video plug instead of extension bus, but that would require a separate power supply cable, and the converter would reside outside the QL case. As QL-SD shows, I'm not a fan of stuff sticking out of the QL case.

Next objection: I see no use in 4 additional GND pins, while an address range at least up to the Minerva maximum of 16 MB could make sense. For example, the Q68 concept is not restricted to usage as a separate machine, and if the remaining bug is ever found, interest to use it inside a QL might come up. The Q68 supports 16 and 32 MB at the moment. (Not that an "inside QL" variant of the Q68 is actually under construction, or would necessarily use the expansion connector for RAM.)

[Dave]

Any motherboard providing the expanded connector would have a suitable quality video output, making a video adaptor/converter unnecessary for expanded boards. You could still plug a video generator board in an original 64-pin QL, but it would serve no purpose on a 96-pin QL.

Further, placing A20,A21 on video pins in the 96-pin J1 would not affect the operation of any existing mass-market expansion, including any future expansion to improve video on an original QL.

Does that address your concerns?

[Dave]

I see no use in 4 additional GND pins....

There is a problem created by the ground and power pins being at opposite ends of the connector, which has caused ground/signal integrity problems for Nasta in the past. Placing a ground point close to the VIN pins seems a solid decision. The choice to add a pair of GND pins was mechanical - to allow them to be jumpered to prevent physical damage to expansions that might be incorrectly inserted. The second pair of ground pins at c9,c10 is an over-abundance of caution.

....while an address range at least up to the Minerva maximum of 16 MB could make sense.

We could allocate A22,A23 to give a 16MB address range on b15,b16? The proposed new board would include Minerva as a base requirement. The OS would be held in flash, and would be reprogrammable in 16k blocks by the user. Since even a BASIC program could do this, there will likely be a jumpered write protect link.

[Peter]

There is a problem created by the ground and power pins being at opposite ends of the connector, which has caused ground/signal integrity problems for Nasta in the past. Placing a ground point close to the VIN pins seems a solid decision.

That could be C29 and C30, 4 pins seems a bit much.

Address lines on the former video output might confuse a (not yet existing) video converter. The board containing the video converter would likely include other features, and might therefore be used with the new motherboard. In that case, better not to use VSYNC and HSYNC for address lines, so at least a possibly connected monitor does not get damaged. R,G,B seem uncritical.

Anyway it is unlikely that both a video converter and an expanded mainboard will ever go into production. So my comments should not have high priority.

[Dave]

That could be C29 and C30, 4 pins seems a bit much.

The intent is to create a grounded area with no loops larger than 30cm possible. It would be hard to meet RF requirements with the current arrangement, and the proposed arrangement provides two different sized smaller gaps that cannot resonate together as they have different, selected destructive harmonics - 3.61 GHz, 7.02 GHz

Address lines on the former video output might confuse a (not yet existing) video converter. The board containing the video converter would likely include other features, and might therefore be used with the new motherboard.

Anyway it is unlikely that both a video converter and an expanded mainboard will ever go into production....

Indeed: in 30 years, a very much needed accessory card was never produced. It is unlikely one will appear. If one did, it would work well on an original QL.

It's always hard to make forward-looking statements. They belong in the appropriate thread.

[Dave]

There has been a mailing list request for A22,A23 to be added to give a 16MB address range. As this is a second request, I will work out the best arrangement for this and post a revised pinout shortly.

Secondly, it has been raised that any expansion card should have its own power regulation and draw from VIN. VIN is nominally 9v on the QL, but will likely be 12V on QL2. 7805s on all cards can handle 12v with ease, though they may be a little warmer. SQBv3 has a switching supply that can also handle 12v with ease.

My intent with providing 1A of regulated 5V was to allow smaller, lightweight cards to be designed without the overhead of allocating space or components for a regulator. It has been pointed out that a single pin on DIN41612 has a 2A capacity. Therefore, c31 has been surrendered and is now unallocated.

There was a private query about releasing the -12V and +12V pins at a31,a30. I think it is unsafe to re-allocate these pins. They do serve a purpose if anyone intends to run a serial port, and for certain audio uses. Further, applying +/- 12v can be destructive to any alternative future use.

The private query also inquired about providing a pin for 3v3. I have no opinion on this and leave it open to comments.

[Peter]

The intent is to create a grounded area with no loops larger than 30cm possible.

I can not follow you here. Using only C29 and C30 as additional GND pins would result in about 7 cm max. distance from any pin (including GND) to the next GND pin.

Indeed: in 30 years, a very much needed accessory card was never produced. It is unlikely one will appear. If one did, it would work well on an original QL.

If you refer to a video converter here, I actually see it as the most important QL accessory, now that SDHC seems almost done. Of course there was no need 30, 20 or 10 years ago, while there still were QL capable monitors. Now, there is much need - I don't even have a solution for myself. (I bought an external converter, but it was crap. And even if it worked, it is big and requires one more case and power supply.)

What I was trying to say: Such a converter would problably not come alone, but with other features that make the board useful for your proposed mainboard. In that case you don't want to damage a connected monitor by feeding it with address signals as sync.

[Dave]

When I said 30cm, I meant 30mm. Sorry! My test for this was to etch a PCB with a series of close track lengths on 0.1" intervals. I then used a signal generator to sweep through a wide frequency range, whilst using a National Instruments 16 channel IO to see what was generated. I found that the two combined lengths chosen produced the best results for frequencies of 66/50/40/32 MHz - the likely frequencies that would have 2nd order harmonics that could be problematic or cause poor RF behavior. The 2.6" (66mm) option caused an unpleasant increase in noise at 50MHz input, and the second order harmonic was 25MHz - two very bad frequencies to have noise when using a 25MHz '020 or 50MHz '060. It is just a coincidence that that position is at the 16-bit data boundary, allowing for much cleaner PCB design when doing 8- or 16-bit designs.

For the proposed display adaptor:
It would work fine on a stock QL.
On the proposed new motherboard, the i/f would serve no purpose. However, the presence of the i/f would be non-destructive. It is a simple matter to jumper the circuit to isolate it without affecting the remaining features on the board. Given the spec would be published, it's a design consideration someone could easily take into account. I recognize that 5v TTL logic into an input expecting 0.7v is undesirable. However, the only reason that would happen would be if someone ignored the specification and deliberately made their device incompatible by not including isolating jumpers.

This is, if anything, an argument for the new board having a completely incompatible extension that retains no original hardware compatibility whatsoever. However, I could see many devices being designed for both machines as universal fit (like a J1-based SDHC adaptor that's a lot faster) and for some devices retain compatibility - like the QEPIII EPROM programmer. Remember, floppy, IDE, quality video and a lot of memory would already be included on the main board. Do you have something exotic in mind?