CPLD replacement for ZX8301

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lliont
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Re: CPLD replacement for ZX8301

Postby lliont » Tue Jun 28, 2022 1:58 am

Well it is strange but the ULA seems to do optimized refresh at the non visible lines or the optimizations don't have a big effect on the speed for the test I run.
I did the same and got about the same speed as the ULA only slightly faster.

My QL memories from the factory are TMS4164-12 that have 4ms refresh period so there would be no problem if it didn't do any refresh at all at the non visible lines.
In another QL I own the memories are HM4864 with 2ms refresh period but need 128 (A0..A6) not 256 (A0..A7) refresh cycles.

With the simple program below I see one of the ULAs works nearly as fast as the cpld even with the optimized refresh that Nasta suggested.
Even when I did a 4 cycle refresh (actually less than 4) and excluded the repeated range at the non-visible lines I get similar times as with the ULA.

The very simple basic test program.
10 CLS
20 FOR i=1 to 500
30 PRINT i
40 NEXT i

I have 2 ULA's and they consistently give different times in the same QL, one is always faster than the other, same markings.

The above program in lowres mode with:

ULA 1 takes about 51.7 secs
ULA 2 takes about 50.9 secs
CPLD takes about 50.6 secs

I'll try some benchmark programs to have a better picture of the performance differences.

ula.jpg


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ones' complement
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Re: CPLD replacement for ZX8301

Postby ones' complement » Tue Jun 28, 2022 5:19 pm

How odd, almost looks like some revision happened in early November 1985 (8544 to 8546) :?


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Re: CPLD replacement for ZX8301

Postby lliont » Tue Jun 28, 2022 5:48 pm

ones' complement wrote:How odd, almost looks like some revision happened in early November 1985 (8544 to 8546) :?


The older ULA is the fast :)


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Re: CPLD replacement for ZX8301

Postby lliont » Tue Jun 28, 2022 10:35 pm

What do the letters 'A' and 'E' indicate ?

A is on the fast
E is on the slower


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Re: CPLD replacement for ZX8301

Postby lliont » Wed Jun 29, 2022 12:08 am

The same tests without the memory upgrade so that the basic code and variables are in the lower ram that the cpld manages give these results:

Fast ULA 51.5
CPLD 50.9

Cpld is about 1.2% faster than the fast ULA, but the ram access speed improvement percentage is bigger because basic interpreter code resides in rom and access to rom is the same for both and a percentage of the code is not a memory access.
So yes some (if any) of the improvements don't exist even in the fast ULA.


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Re: CPLD replacement for ZX8301

Postby Nasta » Wed Jun 29, 2022 2:01 am

It is difficult to test the RAM speed with that simple program because most of the code executed runs in ROM. But you could for instance do a loop of scrolling the entire screen vertically, and then subtract the time an empty loop of the same length takes. This will still have lots of cycles in ROM but the scrolling of the whole screen does include a lot of reads and writes of the RAM. The only other way would be to run machine code from the on-board 128k that also only accesses the on-board 128k, so execution is only dependent on RAM speed.

Regarding refresh, the ULA refreshes 8 rows per display line, so it takes 32 lines to refresh all 256 rows, 2.048ms.
Since there are 56 lines that have no data, and refresh was disabled completely for them, that would equate to 3.584ms of time without refresh, which is too much even for the 4ms refresh requirement, because all 256 lines must be refreshed within 4ms. The remaining time would only manage 52 out of the required 256 refreshed addresses. Even so, a real world experiment might well show that the data will survive as the refresh time is under worst case conditions (high temperature is particularly detrimental to data retainment).
Because the number of total display lines is not divisible by 32, the last 64 row addresses get skipped when the refresh process skips from the last display line (312) back to the first, so they get refreshed 56 lines after the last refresh, 3.584ms, just in time to meet the 4ms requirement. It also works out at half that time for RAM chips that need 128 rows refreshed every 2ms.


lliont
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Re: CPLD replacement for ZX8301

Postby lliont » Wed Jun 29, 2022 2:31 am

The simple basic program does a lot of printing and scrolling so it was a quick way to compare.
I did the real test and it seems to work well without any refresh at the non-visible lines but of course that was only an experiment.
All the times I listed are with the safe but optimized refresh.
What do you think about the big differences of the 2 ULA speeds ?


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Re: CPLD replacement for ZX8301

Postby Nasta » Fri Jul 01, 2022 3:03 pm

lliont wrote:What do you think about the big differences of the 2 ULA speeds ?


Not sure, obviously some optimization was done, the difference in the required logic is very small. It makes sense that a small mask correction could be done between batches.
That being said, I only have one type (will have a look and report which ULA it is) and the way it works was decoded by using a logic analyser to see how the signals behave. The definitive proof of the differences between ULAs would also have to be verified using a logic analyser, but the question is then is it worth it as it is proven in an indirect way by the CPLD optimizations.


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Re: CPLD replacement for ZX8301

Postby mk79 » Fri Jul 01, 2022 3:53 pm

lliont wrote:What do the letters 'A' and 'E' indicate ?

A is on the fast
E is on the slower
No idea. But looking at my pile of spare ULAs I also have the letter "C" and different letters for the same week as yours. Maybe different plants or at least production lines?

Cannot make heads nor tails of the speed difference you report. Are they as consistent as you say? As far as I know there are only two revisions, the old CLA2310 and the later CLA2345 which added NTFS support.
ZX8301_spares.jpg


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Re: CPLD replacement for ZX8301

Postby tofro » Fri Jul 01, 2022 4:58 pm

mk79 wrote:there are only two revisions, the old CLA2310 and the later CLA2345 which added NTFS support.
ZX8301_spares.jpg


No. NTSC, probably? :lol:


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