How good were Ferranti's ULAs at the time ?

Nagging hardware related question? Post here!
Post Reply
User avatar
tofro
Font of All Knowledge
Posts: 2688
Joined: Sun Feb 13, 2011 10:53 pm
Location: SW Germany

Re: How good were Ferranti's ULAs at the time ?

Post by tofro »

PLCC was only standardized in 1984 (granted there were manufacturers already producing them), so you could expect them being rare and sockets and chips themselves more on the costly side - Nothing within Sinclair's interest range.


ʎɐqǝ ɯoɹɟ ǝq oʇ ƃuᴉoƃ ʇou sᴉ pɹɐoqʎǝʞ ʇxǝu ʎɯ 'ɹɐǝp ɥO
Derek_Stewart
Font of All Knowledge
Posts: 3932
Joined: Mon Dec 20, 2010 11:40 am
Location: Sunny Runcorn, Cheshire, UK

Re: How good were Ferranti's ULAs at the time ?

Post by Derek_Stewart »

HI,

Which ULA are you talking about?

8301 or 8302

I did think about doing this a while ago. But I due to the conversations, I thought it was being done by others.

I will put this on the list of jobs...


Regards,

Derek
Nasta
Gold Card
Posts: 443
Joined: Sun Feb 12, 2012 2:02 am
Location: Zapresic, Croatia

Re: How good were Ferranti's ULAs at the time ?

Post by Nasta »

Ferranti (later Plessey) ULAs were un-committed transistor+resistor logic loosely based on ISL logic specs. It's not exactly TTL but similar, has some current steering tricks like ECL. There are a number of die photos available on the net. It would be very difficult to re-create exactly with discrete transistors because it used multi-emitter transistors with emitter size and geometry designed for particular current distribution.
This is quite different than what was used later by LSI logic and even later Toshiba, where the design is a 'sea of gates' one, having already constructed basic gates in NMOS or CMOS which are then connected by metal layer(s).
From what can be seen on the dies, Ferranti clearly used only the final layer to connect the parts. There are a number of buried features in the silicon that can be used as jumpers (multiple connection openings in the SiO2 layer for some parts). There also a metal layer under the SiO2 that provides power, and it seems some sort of bus structure to IO cells (this is similar to what would be later used in FPGAs).
One 'advantage' that these ULAs had was that you could, to an extent, do some analog functions in them if that saved gates.
Apparently there is a book available (behind a paywall) that explains how circuits are designed to fit a ULA.

Now, during the years I have been exposed to some info on how the circuits were designed, but given the 'leaky dynamic RAM' nature of the human brain, take this with a grain of salt:

Ferranti/Plessey only had >40 pins cases in it's later stages of the ULA story (before they got out of that business), in particular 48 pins and 68pins, but these were initially offered only as LCC, which is a very expensive 'upside down' version of what would later become PLCC68, and that was indeed used in the Acorn Electron, and it was one of the reasons for many problems. You can find pictures of the Electron PCB with the very expensive LCC socket for the even more expensive LCC ULA which tended to run very hot (as bipolar logic of that kind does). Even at that pin count the ULA was pin count limited so the Electron actually uses 4 bit wide DRAM (64k x 4) to implement it's 32k of RAM, which was one more reason for problems.

I seem to remember one f the creators of the Spectrum talking abut ULA development, and the problem with that is that they were not exactly developed by Sinclair but rather by Ferranti, most of the circuits would be bread-boarded in TTL by people at Sinclair (albeit with foreknowledge of the future integration int an ULA) and then People at Ferranti would take over. Apparently there was some sort of rudimentary CAD involved running on a mainframe to assist with routing and possibly some simple simulations? I do remember that this was a relatively big point of contention which also forced Sinclair's hand when choosing who would be doing the custom chips, I am guessing that there must have been some sort of financial agreement regarding man and machine hours bought by Sinclair from Plessey, as by the time the QL was made, there were some other options. Sinclair being Sinclair, they almost certainly opted for what cost less at the time, and that would be Ferranti because of existing knowhow. Once Amstrad came along, LSI was already working as well as standard cell custom chip manufacturers that could translate a TTL design to single chip silicon almost literally (If I remember right, Chips and Technologies was one of the first in that field, from this point in time it is hard to believe they would eventually, by a very circuitous route become the giant that today is TSMC).

Could the resources of the given Ferranti ULAs have been put to better use and more features could be crammed into the 8301 and 8302? I am certain that some fairly small but important things could have been implemented that never the less could have brought substantial improvements in performance, if there was more time - but I doubt it would be anything major and drastic. I suspect that most of the ULA development would have been efficient routing, and this is always the major problem as getting sufficient man or machine power to do this was very expensive at the time. While there were revisions of the 8301, I guess once the motherboards were committed, little could be done to add significant functionality while keeping compatibility. Though, I am quite certain the RAM timing could have been improved and some speed added, even with existing RAM.

Also, as I have speculated before, there is some evidence that the 8301 and 8302 were initially intended to be a single chip, one of the biggest clues is the way PCEN is derived as well as the initial QL motherboards connecting the 8302 data bus to the RAM data bus, which is exactly how it would have been internally connected in the same chip. It is highly likely that Sinclair abandoned the idea having seen what Acorn got themselves into with the Electron.

Finally, there is the question of re-creating the ULAs with modern chips. This is certainly possible for the 8301, there is more than sufficient data to not only re-create it but also improve on it. Using a 3.3V FPGA to do this is not a huge problem with the 8301 as there is a limited number of signals that need converting form 5V to 3.3V TTL and all the lines except the RGB and HV synch can be driven by 3.3V outputs from the FPGA. In most places resistive divides and Schottky diodes would do the trick, which was also used on the ZX81 and Spectrum ULA replacements offered on the retro market. The 8302 is a bit more tricky as some deep diving into system software and some collection of data from multiple sources to get the IPC and microdrive circuitry right. The 8302 actually has one superfluous pin - it has both PCENL and DSMCL and actually only needs one to decode properly given a correct implementation of PCENL in the 8301. Alas, I think that both are needed for compatibility on a QL motherboard since one cannot guarantee which motherboard and 8301 version will be used.


Post Reply