Ethernet for the QL

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Dave
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Re: Ethernet for the QL

Postby Dave » Mon Mar 08, 2021 5:10 pm

I am doing some work on this today.

As it stands, it's using an ATF1502 for logic, 2x 512K SRAMs (896K available) and the CP2200.

It'll have a through connector. All usual peripherals should work normally, including (S)GCs.

The only thing I'm unclear on is if it should carry a 16K EPROM or not. And if so, where should the EPROM be positioned in the memory map?


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Re: Ethernet for the QL

Postby martyn_hill » Mon Mar 08, 2021 5:34 pm

Hi Dave!

Dave wrote:The only thing I'm unclear on is if it should carry a 16K EPROM or not. And if so, where should the EPROM be positioned in the memory map?


The perennial expansion question... If attached to a BBQL, the only options are either to occupy the usual 16K slot at 0C000, or else to carve-out 16K from from your RAM expansion area. Even then (above the RAM expansion), not all QDOS ROMs look there for extension code with any degree of perseverance - though Minerva does.

If an SGC is fitted (not sure about the GC), then we've got its 'virtual' Ext IO space at 4C0000, which is cleverly arranged to appear on the 20bit Address bus as if at A18..19=11 == C0000 - the 768K mark.

Looking forward to hearing more progress in due course!


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Re: Ethernet for the QL

Postby Dave » Mon Mar 08, 2021 6:04 pm

martyn_hill wrote:The perennial expansion question... If attached to a BBQL, the only options are either to occupy the usual 16K slot at 0C000, or else to carve-out 16K from from your RAM expansion area. Even then (above the RAM expansion), not all QDOS ROMs look there for extension code with any degree of perseverance - though Minerva does.


For a non-accelerated BBQL, I'd like to offer the longest continuous memory without interfering with the external ROM slot or very common expansions. I don't think people will mind if it manages 880K or 864K instead of 896K.

martyn_hill wrote:If an SGC is fitted (not sure about the GC), then we've got its 'virtual' Ext IO space at 4C0000, which is cleverly arranged to appear on the 20bit Address bus as if at A18..19=11 == C0000 - the 768K mark.


There are a lot of free pins on the ATF1502. That suggests offering "none/GC/SGC" jumpers, and offering logic updates if they prove beneficial. As an open hardware board, anyone could offer custom updates, or reprogram their own board for unique situations through the JTAG header.


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Dave
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Re: Ethernet for the QL

Postby Dave » Mon Mar 08, 2021 10:01 pm

I got this far today:

Screen Shot 2021-03-08 at 3.59.01 PM.png


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Re: Ethernet for the QL

Postby Martin_Head » Tue Mar 09, 2021 10:41 am

Dave wrote:I am doing some work on this today.

As it stands, it's using an ATF1502 for logic, 2x 512K SRAMs (896K available) and the CP2200.

It'll have a through connector. All usual peripherals should work normally, including (S)GCs.

The only thing I'm unclear on is if it should carry a 16K EPROM or not. And if so, where should the EPROM be positioned in the memory map?

I don't know if you have looked at my Q68 Ethernet driver. But if you are thinking about putting my driver on EPROM, it's about 21K at the moment. Some could be shaved off, but I don't know if it could be brought down to 16K.

Another thing you may wish to consider, is that it uses a 256K buffer as a user heap to store read data packets until the application uses them. I don't know how much this buffer could be reduced before you start getting out of memory errors. 256K seemed like a reasonable size. And the Q68 got plenty of RAM.


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Re: Ethernet for the QL

Postby Peter » Tue Mar 09, 2021 12:12 pm

Dave wrote:The only thing I'm unclear on is if it should carry a 16K EPROM or not.

Is there a specific use for this EPROM that you have in mind? Otherwise I would leave the ROM space for hardware that needs to have ROM for boot purposes, like QL-SD or floppy controllers. Those usually come with own ROMs.


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Re: Ethernet for the QL

Postby Peter » Tue Mar 09, 2021 12:20 pm

Dave wrote:I got this far today:

Thanks for the picture, now I understand where you locate the network connector... unfortunately that makes the board large, but with QL bus through connector, I also have no better idea.


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Re: Ethernet for the QL

Postby Dave » Tue Mar 09, 2021 5:46 pm

It does. The PCB is one of the cheaper components and I don't mind eating the expense.

I have not yet measured exactly how far down the ethernet socket needs to be, but when I know and add the through connector I will shorten the board as much as possible. Of course, Tetroid's backplane will fit nicely onto this. It might make sense for me to add the buffers like on his extender card as this would certainly help signal quality over that distance. Currently, all pins will be passed through except R, G, B.

I plan to assemble ten of these and put them into the hands of people most likely to develop code/tools to use them. I'll listen carefully to feedback and use it to improve the design. This might include adding in QL-SD on the free front edge, or a different memory arrangement, as there's a LOT of free area on the board.

For now, it might be good to start as a group producing the equations based on an ATF1502 - they will be open, so they should be openly created and discussed.

In summary, the logic needs to produce chip selects for the CP2200, and a flip-flop to suppress interrupts until the flip-flop is configured. It needs to produce chip selects for two 512Kx8 SRAMs and a 16K EPROM. There are 33 pins free on the ATF1502 after allowing for power, ground and JTAG and they can be very flexibly assigned - just like a super-large GAL. The equations can be written as if for a GAL, in the same format. I will likely use WinCPUL to make the JEDECs.


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Re: Ethernet for the QL

Postby Peter » Wed Mar 10, 2021 11:10 am

Dave wrote:It might make sense for me to add the buffers like on his extender card as this would certainly help signal quality over that distance.

Did I understand correctly, that you want a (S)GC on the through-connected bus? Then you can not simply buffer the bus, as you don't know the direction.


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Re: Ethernet for the QL

Postby Peter » Wed Mar 10, 2021 11:15 am

Dave wrote:It needs to produce chip selects for two 512Kx8 SRAMs and a 16K EPROM.

Again: Is there a specific use for this EPROM that you have in mind?



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