Ethernet for the QL

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Peter
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Re: Ethernet for the QL

Postby Peter » Mon Jan 04, 2021 12:36 pm

Martin_Head wrote:I also use the QL's hardware RTC clock (PC_CLOCK is it?) in places.

Yes, this is identical to the QL.
Pr0f wrote:From a very quick digest of the datasheet for the CP2200, the places where a timer may be required:
[...]
Waiting for Flash Write - the write itself is done by hardware and no timers are required to manage the write - only to verify the process has completed - again it's flagged on interrupt register.

The Flash does not need to be written.


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Peter
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Re: Ethernet for the QL

Postby Peter » Mon Jan 04, 2021 2:07 pm

Pr0f wrote:I don't know how latent the external interrupt line is (as that would have to be used if not polling for interrupt statuses on the default interrupt scheduler.

This latency is not predictable as other interrupt handlers use the same level.


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NormanDunbar
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Re: Ethernet for the QL

Postby NormanDunbar » Mon Jan 04, 2021 2:19 pm

Peter wrote:Happy new year Norman! That with your level looks like British understatement to me. ;)


Nah, no understatement, I'm a "trainee" hardware guy, better at software - most of the time!


Cheers,
Norm.


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Derek_Stewart
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Re: Ethernet for the QL

Postby Derek_Stewart » Mon Jan 04, 2021 5:45 pm

Peter wrote:
Derek_Stewart wrote:Maybe the Qubide Ram card could be modified to have Ethernet integrated into the circuit board. I say this as the circuit board schematics are available.

I'm not sure which exact card you mean, can you post a link maybe?

Ideally, the solution would also allows an (S)GC. I didn't have an idea how this could be done, except with a backplane.

I meant the Qubide Ram IDE Card by José Leandro, which connects to a standard QL.

But I guess the SGC is requirrd for the faster processor.


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Derek
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Peter
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Re: Ethernet for the QL

Postby Peter » Mon Jan 04, 2021 6:19 pm

Derek_Stewart wrote:I meant the Qubide Ram IDE Card by José Leandro, which connects to a standard QL.

Do you mean this one? http://hardware.speccy.org/temp/qubide-i.html


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Re: Ethernet for the QL

Postby Derek_Stewart » Mon Jan 04, 2021 11:29 pm

Peter wrote:
Derek_Stewart wrote:I meant the Qubide Ram IDE Card by José Leandro, which connects to a standard QL.

Do you mean this one? http://hardware.speccy.org/temp/qubide-i.html

Yes thats the one...

Maybe a dedicated expansion woukd be better, which could be connected tontge Super Gold Card with a Mini Back Plane: viewtopic.php?f=2&t=1945&hilit=mini+backplane&start=30#p17649


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Re: Ethernet for the QL

Postby Martin_Head » Tue Jan 05, 2021 10:59 am

Pr0f wrote:From a very quick digest of the datasheet for the CP2200, the places where a timer may be required:

Waiting for initialization after clock stabilized - this could be done simply by checking the interrupt flags to see if we got that interrupt or not - and wait on an interrupt polling loop until it was received.

Waiting for Flash Write - the write itself is done by hardware and no timers are required to manage the write - only to verify the process has completed - again it's flagged on interrupt register.

Reading packets from FIFO buffer in the CP2200 after interrupt - there is conditional requirement these are read withing 51.2us of the interrupt, otherwise a random read must be used rather than autoread. I don't know how latent the external interrupt line is (as that would have to be used if not polling for interrupt statuses on the default interrupt scheduler.

The chip seems to take care of a lot of the very low level stuff, provided it is serviced quickly by it's interrupt handler.

I had a quick look at where I use the hardware timer. I use it in about a dozen places.

1. For timing the route time in PING. which can be less than 1mS
2. As a random number generator for the TCP Sequence numbers
3. In the CP2200 initialization. 10 Seconds, 2mS, and 4 Seconds. There is also a 2mS, 1.5 Second, and a 250mS in the Auto-negotiation (Which is not yet implemented)
4. A 1 second delay when writing a packet to the CP2200

Without looking closely. I think A lot of the delays, will wait up to the time specified before deciding something went wrong.


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Peter
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Re: Ethernet for the QL

Postby Peter » Tue Jan 05, 2021 1:45 pm

Many thanks Martin! Apparently I underestimated how useful the Q68 high resolution timer is...

It's surely possible to do without the 2 ms for initialization and autonegotiation, so the accuracy of PING looks like the only severe issue when a 20 ms / 50 Hz timer is used.

But removing the Q68 timer dependency causes more driver changes that I thought. If a little PLD could be used instead of a GAL, maybe a hardware timer should actually be implemented for a QL ethernet card.


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Re: Ethernet for the QL

Postby Pr0f » Tue Jan 05, 2021 2:11 pm

One other possibility is to drop a 68901 device on the 'LAN Card' and use it to provide both the timers (the device has 4 available), and take the interrupt signal from the CP2200 as well, which then also solves that issue. Possibly a little overkill...


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Peter
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Re: Ethernet for the QL

Postby Peter » Tue Jan 05, 2021 3:03 pm

The MC68901 sounds like a nice idea, since a good UART is also needed for the QL. But how about the large 48 pin DIL case and the fact that it is obsolete?



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