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Re: Issue 8 discussions...

Posted: Wed May 08, 2019 6:36 pm
by tcat
Hi Dave,

Thank you for an in depth answer. Need to digest. Re MDV head board, there ara two elyts around 78L05 voltage stabilizer. I think .22 and .47 uF, closest I have are radial 1uF on 64V. Good idea to replace?

Many thanks.

Re: Issue 8 discussions...

Posted: Wed May 08, 2019 6:37 pm
by Dave
Pr0f wrote:If Dave's design provides some additional gating around the interrupt area, then all things are possible :-)

I just want to clarify that this is not my design. It is Nasta's design. Nasta's logic. Nasta's schematic. We're co-developing the PCB layout and I will be doing the hardware production. Weirdly, I have quite a few retro hardware projects under my belt, but not on the QL.

I think it is important to state this so you know there is a competent mind behind the process. Juuust not mine ;)

There are some features we'd like to see supported in future versions of SMSQ/E. It's a catch-22 situation where the hardware needs to exist for driver development, and without a driver it is hard to know what the driver might look like.

This has happened with the serial card (which is important and brings fast ethernet, wifi and bluetooth capabilities to the QL, plus a LOT of very capable GPIO options including PWM, I2C, SPI, sound including 44.1KHz stereo output, relay control, monitoring, temperature sensing, etc. etc. ad nauseum.

So this has affected me in two ways: firstly, when we have a GREAT project, we don't discuss it publicly until we're confident it will attract timely coder support. It took, I understand, ten years for Aurora drivers to arrive. We simply don't have the time to wait that long for new hardware to gain OS or driver or software support. The QL has been around 35 years, and these boards will easily make it another 35 years and more. Very few of us will be around then to see it.

People like Nasta, Peter Graf and myself, we have the hardest time bringing out new hardware. Beyond the competing demands of users who have their own interests, there's a general divide between hardware and software developers. A couple of people seem to cross that divide quite effortlessly - Marcel Kilgus and Jan Vanderbeek come to mind - but they have neither the time nor inclination to develop the level of new hardware that's needed to keep the QL relevant. So we're nibbling at the edge of what's possible: Peter's QL-SD giving us the only storage option that involves a currently mass manufactured media format, for example.

After two years of asking, just in the last two weeks I have got two interesting offers to develop and test a serial driver. So I am quickly churning out five serial cards to send out to those two people, one to Nasta, plus a couple here for testing. If we get a workable system there will be HUGE benefits to the QL community. I'm hoping after that becomes widely available, my request for coding help with GD2 drivers fir a new and capable video card will be taken more seriously. If anyone wants to get an early heads up, they can email me. It's not vaporware.

Re: Issue 8 discussions...

Posted: Wed May 08, 2019 6:40 pm
by Dave
tcat wrote:There are two electrolytic caps around 78L05 voltage stabilizer. I think .22 and .47 uF, closest I have are radial 1uF on 64V. Good idea to replace?

There's no need to replace these unless actual noise is getting through onto the 5v regulated line. If it is, the cap you have will work.

Re: Issue 8 discussions...

Posted: Wed May 08, 2019 6:47 pm
by tcat
Hi Dave,
Many thanks, I have also followed Iss#7.5 posts, what happened to these, were it just a stepping stone to Iss#8, or have any boards been made already?

Re: Issue 8 discussions...

Posted: Wed May 08, 2019 7:12 pm
by Nasta
The J1 DIN41612 connector is implemented, but some signals have been changed. We've converted some to ground, and others to extend the address bus. Also, the 68SEC000 does not implement the 6800-style interrupt system, so we made useful changes there. The only card we're aware of that used the 6800 interrupt system is the QEPIII programmer - that will not work with Issue 8.

Just to clarify, not the 6800 interrupt system, but 6800 peripheral interface system.
In particular, signals E and /VPA are not implemented, though the latter is used to signal interrupt auto-vectoring, which is still implemented using a different signal on-board.
Lines that have been converted to other use were very carefully chosen to keep everything compatible.

As Dave has said, ISS8 is intended to fit in the old black box, and still be as much as possible the original QL. In a way, it's 'the last hurrah' for the old system, but since it is exactly that and we do have other things planned in the future, it is also going to serve as a development platform, so a few tweaks and enhancements have been done to the hardware to make that possible.

Re: Issue 8 discussions...

Posted: Wed May 08, 2019 7:21 pm
by Nasta
Pr0f wrote:Level 5 is only unusable in a stock BBQL because :

1) the autovector is unusable in current ROM
2) The hardware has no feature to block a level 2 interrupt, so although you can generate a level 5, it is likely to become a level 7 because of that other IPL line getting toggled by the ZX8302 or even worse - by the IPC chip which can theoretically control both IPL lines (only 2, as 68008 48 pin variety bonds 2 of the 3 together, giving 0 (none), 2, 5 and 7)

If Dave's design provides some additional gating around the interrupt area, then all things are possible :-)

That being said, on ISS8 the pins of the IPC that can cause an interrupt are not connected as this feature could never be reliably used in the first place - not even interrupt level 7 (NMI) which would have been very useful. To my knowledge (and I will gladly stand corrected) nothing was ever done to support this, except attempts to prevent the machine crashing if accidentally used.
Aside: as far as I am aware, not only is there the possibility that any higher level interrupt than 2 could be turned into level 7 when caused by the IPC, the original IPC code prevented proper use because there was also a bug in it.

ISS8 is likely to incorporate an interrupt encoder so that level 2, 5 and 7 (which is what the original QL can use) can be properly handled. Under normal circumstances, only level 2 is used and handled through the 8302, so it is the same on ISS8, the 8302 interrupt pin goes to level 2 and remains compatible.

Re: Issue 8 discussions...

Posted: Wed May 08, 2019 7:26 pm
by Dave
We previously designed an Issue 8 board. It suffered in that we didn't have a clear vision of WHY were were doing it beyond "it's new and improved" so it ended up being a capable design that checked some random boxes and missed others.

So, designing it told us what was important and why.

So, I cam back at it fresh and started working on an Issue 7.5 board. It started with me entering the Issue 7 schematic into my capture program and separately getting the PCB files from Tetroid (Hi Vitaliy!) My original plan was to simply make a run of Issue 7 boards, but in 4 layers with power and ground on their own layers. When I started looking at it I realised it was just locking in a bunch of problems for the next 35 years.

The poor power supply choice - right for 1983 but not today.
The inflexibility of the video output format - few displays will work in 35 years and mode 4 doesn't work on most and never has.
The memory design was poor even in 1983. Today, repeating that would be a crime.

So I started fixing the worst excesses, and Nasta took an interest and revised the memory subsystem. Then I got my hands on a large pile of dual port SRAMs and options opened up to isolate the CPU bus and 8301 private bus. Benefits include handing the CPU access to the bus 100% of the time instead of 39% of the time, and making the 8301 a replaceable accessory in the future. I talked with Marcel and the conversation turned to running SMSQ/E on it, and with that list of requirements Nasta revised the logic so all ROM is shadowed by SRAM. I wondered about overclocking potential, so we changed the clock generation and distribution system. Other changes as needed. The only rule is that all changes have to be 100% QDOS compatible. QDOS and Minerva will not know it's not an Issue 7 QL they're running on.

It's still evolving. I just hope to have something I can show you, that boots, within my self-imposed deadline.
Screen Shot 2019-05-08 at 1.18.30 PM.png

One thing that IS now firmly tied down: it will have 1MB SRAM on board and be expandable to 16MB. The expansion memory will fill all space available that isn't used by another device. It will need a 128K mode to run some games that only run on unexpanded QLs. They will probably be too fast to be playable, even at 7.5MHz, though.

So, TL&DR; We designed an Issue 8 board, then later an Issue 7.5 board. The Issue 7.5 board surpassed the Issue 8 board so the OLD Issue 8 board is an anachronism and the Issue 7.5 got renamed to Issue 8 because it is too advanced from Issue 7 to be a 7.X board. When I release the schematics and code of THIS issue 8, I'll also release the schematics of the OLD Issue 8, just for historical interest.

Re: Issue 8 discussions...

Posted: Wed May 08, 2019 10:25 pm
by Cristian
Dave wrote:We've done another small yet big change with the ROM port, but we're not ready to discuss it yet. It doesn't affect compatibility but improves flexibility of expansion options.

Yes! This is so interesting! I always wondered why the ROM port is so underutilized!

Re: Issue 8 discussions...

Posted: Wed May 08, 2019 10:32 pm
by Dave
The simple addition of a Read/Write pin would have made it far more useful. It was surprising how many devices used it as an expansion port for IO or storage, and not just as a ROM location. All of the IO expansions in the ROM port would have been better suited to the internal expansion port.

I debated adding two extra contacts to expand its usefulness, but I considered it unlikely anyone would ever make new hardware for that port. I decided it would be better to invest the energy into making a more useful Extension bus.

Re: Issue 8 discussions...

Posted: Sat Jun 08, 2019 4:22 pm
by Dave
Woo! Update!

Nasta came out of his busy spell, and had some time to work on Issue 8 and the serial card. These are now functionally complete schematics.

Sooooooo... Progress!

Thanks Nasta!