Paul wrote:As the GPIO is 3.3V and QL is 5V some interfacing has to take place.
For Example by using 74LVX245 ICs. Thats why I am so keen on any Information about buffered QL backplanes.
It's not easy to figure out the possible ways how the bus can be used (directionwise) because I guess while "normal" Adress lines are only read from BUS when using the expansion Slot this will change in case a GC or SGC will be used behind the Buffer.
Kind regards Paul
With the R/W pin there it makes direction control easy. I personally prefer the TXB0108 because of the flexibility it provides (one PCB and Pi you can decide which GPIO are inputs or outputs and change them on the fly) but it is a bit pricy - $1.14 instead of $0.64 each. However, when only using 3 or 4 and having a very small run design like this, I think it's worth the extra expense. The TXB also performs better in this application.
If we treat this as a QL expansion device and give it a 16k decoded block, that would certainly increase options and make it a lot more flexible. If someone wants to do a simple GAL decoder and I focus on the PCB design?
My instinct is to make it a card that site the Pi just outside the QL, with ethernet and USB facing back and just hung off the edge of the card so you can use the usual spacers to mount the Pi securely. Do you want to be able to choose which GPIO go where, or is there a consensus of maybe....
8 bits data bus, 8 bits address bus (giving 256 byte addressable range), device select from address decoder, R/W line, room for 6 more GPIOs with 3x TXB0108 or all the remaining GPIO with 4x TXBs. Do you want a little thru-hole work area to maybe at sensors? Or bring out the SPI ports? Any other requests before I do a V1 of this?