The Sinclair QL Forum

Here is a very interesting vendor from Poland that has several available batches of 8749 IPC chips. Ignore the first 4 which are one time programmable used, hence already programmed and not erasable. https://www.ebay.de/str/tvsatelectronic/IC-Microcontroller/_i.html?_storecat=18701871014&_sop=2...

It's a shame we can't use HTML like tags

e.g.

[SARCASM]The written word should be read without inflection or emotion[/SARCASM]


Personally I love a good emoticon

I saw it was in quotes so assumed it was meant to be taken tongue in cheek. I do have a problem with the over censoring that now seems to be creeping into IT - The product I work with - NetBackup - has the concept of a Master server - but now it seems our documents need rewriting to call these "...

Vinegar or glass cleaner is a good solvent for silicon(e)

looking at the circuit diagram for the medic- it also uses the same SP0-SP3 decoding scheme as the QEPIII - meaning if your backplane doesn't alter any of these SPx signals - the QEPIII and Medic disk interface are trying to use the same address. If you cut the line for SP0 on the backplane after th...

QEPIII also uses the synchronous bus signal E which is not provided by Gold or SuperGold cards.

ASL isn't used on standard QL expansions - so that could be cut with no issues. QEPIII probably expects to be at 0c0000 - but it's designed to use the slot select lines SP0-SP3 - which are all 0v from the QL - hence that default first address for the QEP card. Does your backplane alter the SP0-SP3 l...

It was a note on the aurora manuals - which is why that signal was still provided on the bus

I wonder if the use of vsync signal to the FDC is just a cheeky way of knowing the state of that signal, so you know when you are in vertical flyback?

I never noticed that before!

I know the Gold card doesn't use CSYNC signal - but I believe the SGC does - for refresh clock for DRAMS - so might be worth checking that signal is not mis-wired somewhere in the cable for the monitor...