The Sinclair QL Forum

François,

and out of curiosity: Do you own a NeXT Station Turbo (rare machine) or did you just read the figure somewhere?

Peter

Hi François, thanks for the interesting results. You can remove the question marks at 40 MHz for the Q68 CPU, it is the actual clock rate. I have a question: Since we came from the SGC successor discussion, where a 50 MHz 68EC030 was considered versus a Q68 with (yet unfinished) cache: Could you pro...

Hi François,

thanks for the interesting result. I think another topic "Q68 speed vs 68030 speed" makes sense.
Since you are the one who performed the test, it seems better if you also start the topic. Maybe just copy the same message, or move it over, if the forum tools allow that.

Peter

If we do go for a uC to attach such things as a keyboard matrix, I'd be happy to develop the uC code. Sounds great, just in case I was not clear: That is a Q68 issue. A SGC successor that plugs into the QL extension bus would not need it. However, a Q68 inside QL case, made possible by such an adap...

Even then I think it became a sort of unspoken concensus that MDV contents should be transferred to other more reliable media. However, I may be writing based on a wrong assumption - that is, the replacement replaces the whole motherboard. To transfer cartridges, you need a machine that still suppo...

There are some other things to consider, such as slow QL bus timing may require more cycles to complete than the CPU will have at it's disposal, between two two RAM accesses to get screen data, and this gets messy depending on what revision of the QL motherboard is in use. Yes, I assumed that video...

The PLD is not the problem, the RAM is, minimum CAS low and CAS high in a page mode cycle is 25ns for -60 speed grade RAM as used on the SGC (1Mx4), and, granted, it may well be that different manufacturers specify 20ns for that speed grade, but this is what I used. We were talking a PLD replacemen...

The QL keyboard can be used with Q68 by using a matrix to PS2/USB adaptor like this https://www.nxp.com/files-static/microcontrollers/doc/ref_manual/DRM014.pdf Thank you, but unfortunately it is not ready for a QL matrix. Someone would have to develop new software for that specific microcontroller ...

Back to your older post: What I was aiming at is a fairly small capacity (in today's terms, but probably big in QL terms) flash to boot from - which unlike the SD card (which is really very closely related technology) is soldered on the board (and can be updated from SD!) , holds something like any ...

Taking into account what kind of realistic DRAM cycles can be generated from a 48MHz clock (and I did not go into a deep analysis), we can calculate that we can squeeze 133333 access cycles into one 60Hz refresh period. This would be the theoretical maximum bandwidth only for the 68020. Since we ne...