Hi Ruptor In case it helps any to understand what you are seeing, consider the following sequence: a) The RAM test starts by writing to DRAM from 20000 onwards. It cannot know whether or not a given byte was actually successfully written until the next stage, and so it proceeds through (almost) the ...

Hi again... Coming back to your original question - the main reason why Charles' two units are not interchangeable is likely because the micro-controller code has to differ in order to interpret the diverse file-system formats that are effectively embedded in the (same) electrical signals that appea...

Hi Ruptor The pin-out from the MDV headboard to the baseboard differs between QL and ZX MDV units (the baseboard being part of the QL mainboard, but separate inside the ZX MDV units), so you would need to add a physical adapter to accept the QL pinout and match it to the ZX baseboard. Doable... Ther...

Hi again Chr$

I'd then recommend downloading the full package from Dilwyn's site (under the 'Front Ends' section) - there's also an updated version (1s14 - modeified by MK) there, which I use.

There's examples and other documentation in there worth reading

Hi Chr$ I'll attach my own qascade_rc (as a zip file to get through the forum attachment limitations), but in short, you can invoke an SBasic _bas file from Qascade using a line such as: For SBasic (QPC): SBAS;Load SBLM;win1_tools_sbas_sblmInit_bas,con_784x80a16x512,con_300x496a500x16,con_484x496a16...

Hiya Tobi! a failed EPROM seems relatively unlikely. Any lines stuck on the data bus would most probably affect the screen display. Indeed, but Ruptor doesn't describe the latest display - only that the digits of Minerva's RAM test are visible. I've had such a semi legible display before - enough to...

Hi Ruptor! So, now we are getting someplace :-) To help you interpret Minerva's RAM failure messages, there is a simple Basic utility that came part of the Minerva software 'distribution' - of course, to run it, you'll need a working QL or emulator to-hand... In short, however, the first long-word o...

Hi Ruptor If the memory test seems to complete, but the expected boot-up screen doesn't follow, then the next section in the QDOS ROM's start-up sequence involves configuring the ZX8302 (e.g. stopping any previously running MDVs, setting the default output BAUD rate, etc.) then reading the real-time...

Hi Ruptor Yes, the schematic in common use remains a little inaccurate in some regards (most notably, that the Iss6 schematic still shows the ZX8302 as attached to the internal RAM/8301 Data bus, whereas it is in fact connected directly to the CPU side of the bus). Out of interest, which copy are yo...

Hi Bytesguy! Well, that was something of an adventure, wasn't it! Some of those switching regulator replacements can certainly be noisy and, given the closer proximity to the MDV in slot#2 versus slot#1, coupled with (typically) the MDV in slot#1 having a simple shield around the ULA, the end result...