FPGA replacment for the ZX8301 ULA and more

[lliont]

This is my new project, not just a ULA replacement but also a QL upgrade

Cyclone IV FPGA
PLCC 52 68008FN10 CPU
2MB internal ram

I used the SPI interface I had designed for my Lion Computer and converted the smsq QL-SD driver to work with my hardware so I have the functionality of the QLSD

There is a 8K rom implemented to load the driver to a reserved area in the end of the 2MB ram and to hold some new basic extensions for the new features (plot command for 64 colors, cls2 that clears the extra video ram, sprites etc).
This way the driver rom does not cut the ram in half and 1792K are available. This rom is automatically recognized by Minerva, for QDOS a call is needed manually.

I added 16K video ram that is internal to the fpga and can be accessed in parallel with the standard ram so I have 64 colors in mode8 and 8 colors in mode4
The fast video ram access is also implemented in the fpga so it steals 3 times less CPU cycles than than standard QL did even with the new video ram.

I added 31 sprites, 16x16 pixel size with 15+transparency colors (also implemented similar to my Lion Computer).
It is easy to double the number to 62 sprites since the resources in the fpga are sufficient for now.

I continue to test if all work ok and since I have free resources I may add more (how about more sound channels and a noise channel)

This is how my QL looks inside, I hope it'll cope it has been through a lot of mistreatment.

(Many of the cables you see are not part of the project, they are previous mods for selecting boot rom something I will include in the project maybe)

[Chr$]

All very impressive stuff.

[martyn_hill]

Fantastic development, Leon!

Your work is a real service to the QL community

Given your 10MHz capable CPU, I wonder if there is scope to run the system faster?

The usual concerns are the MDV and NET driver timings - well, my own investigation shows that we can run the 8302 at 10MHz happily and still maintain compatibility with existing MDV cartridges and it's realatively trivial to tweak the NET driver for a slightly faster CPU clock - I've plenty of experience in that area.

So, if it were technically possible to run the hardware at 10Mhz, I'd be happy to work on any OS/driver updates to maintain NET/MDV compatibility...

But in any case, what you've achieved is awesome!

[lliont]

Hi and thanks, yes it's worth trying the 10mhz sometime, could be made an option, you can help then.
For now I have to make basic extensions for the sprites not to have to poke to use them and others for the extra colors.
Also have to finalize the pcb's fixing an error and adding flash memory for QL roms on the cpu board.

[Pr0f]

Fantastic development, Leon!

Your work is a real service to the QL community

Given your 10MHz capable CPU, I wonder if there is scope to run the system faster?

The usual concerns are the MDV and NET driver timings - well, my own investigation shows that we can run the 8302 at 10MHz happily and still maintain compatibility with existing MDV cartridges and it's realatively trivial to tweak the NET driver for a slightly faster CPU clock - I've plenty of experience in that area.

So, if it were technically possible to run the hardware at 10Mhz, I'd be happy to work on any OS/driver updates to maintain NET/MDV compatibility...

But in any case, what you've achieved is awesome!

Slightly off topic - but is it possible to detect the speed of the CPU and then use that information to dynamically adjust the QL net timings ?

[martyn_hill]

Hi PrOf!

Slightly off topic - but is it possible to detect the speed of the CPU and then use that information to dynamically adjust the QL net timings ?

(With apologies to Leon for temporarily going OT...)

In principal, yes - infact the QXL version of the TK2 NET driver attempts to do just that using macros and a fancy Timing Constant (TC) table (in 'dd_nd_qxl_asm') - but gets it slightly wrong in my experience - it measures my QXL II CPU clock at 19Mhz, rather than 20 and the difference in calculated TCs needs manual adjustment before reliable networking can proceed.

The limited selection of available 'basic' QL CPU clock speeds however (i.e. only 7.5MHz today - possibly 10 if Leon can do some more magic later...) suggests that rather than dynamically calculating the TCs, it may be more effective to devise/test a fresh set of TCs for 10MHz and then detect whether we are running beyond 7.5MHz and simply select the new set of pre-calculated TCs accordingly.

In the GC and SGC variants of the TK2 NET driver, the different TC sets are coded in a pair of tables and then selected depending on the target TK2 build.

In any case, -IF- TK2 is built with the NET driver targeting GC/SGC ('dd_nd'), then the TCs can be easily adjusted at run-time (e.g. in your BOOT file) - as it stands, the basic TK2 NET driver ('dd_qlnd') does not make the TCs adjustable.

Back on Topic now - we can spark a fresh thread if needed

[lliont]

Nice,

Expansion Cards can coexist with the fpga ula and work well
but (if they have rom) their rom mess with the detection of extra ram and so less than 1792K will be available to the OS in that case.

[Pr0f]

your processor potentially supports upto 4MB - so you could play with the edge connector signals, and fool plug in cards into thinking they are running at their nominal address of 0C0000, where ROM scanning looks for ROMS's here.

Normally plug in cards would expect A18 and A19 to both be high - but suppose you also require A21 to be high. This means the edge connector will effectively be pushed up the memory map a bit - Minerva should scan until the end of RAM anyway - and so the cards should be detected at the higher addresses. Expansion card manufacturers are supposed to write code that can be relocatable - so the actual address they are running at should not be critical.

[lliont]

This will require to disconnect one of the A18 or A19 pins of the expansion and replace it with A21, clever trick and may work if Minerva tries to look for drivers up there. It is true that both Minerva and QDOS look for ram as long as they find more but does Minerva look for driver rom beyond 1MB? up to where?
And if it does then Minerva will detect the same driver many times as there will be mirror images (maybe I can take care of this).
But I don't think I like altering the expansion port and A21 might be useful for a 4MB version later. (with 4MB one will wait minutes for the QL to boot )
Also having storage and ram there is not much need of other cards.
I only temporary installed the qubide card to copy files from the flash card to the sd card.

[Pr0f]

in your cpld / fpga you could intercept A18 / A19 and use these together with BG and A21 / A20

Why BG? - if BG is asserted - the remapping doesn't happen - the A18/A19 have their original purpose - this would allow Gold / SuperGold card to take over the QL as before.

If BG is not asserted - then A18 and A19 have their same purpose on the expansion connector - but only when A21 / A20 are both also high - this means the edge connector will then sit higher up the memory map.