The Sinclair QL Forum

Derek_Stewart wrote:

XorA wrote:

Peter wrote: Hmmm... how about emulating a Q68 for that purpose?
In a first attempt, you could try enlarging RAM to 28 MB, load the Q68 SMSQ/E binary to $32000 and just jump there... The Q68 is quite close to a QL, so SMSQ/E might even boot. IIRC Richard had emulated several portions of the Q68 in his private UQLX variants. Maybe that code can be recovered if you are interested.

Now that is a GREAT idea.

Hi,

I can only allocate maximum of 16Mb in sQLux and UQLX, how do I increase the memory size?

You need to change the code where allocation occurs.

XorA wrote:

Derek_Stewart wrote:

XorA wrote:
Now that is a GREAT idea.

Hi,

I can only allocate maximum of 16Mb in sQLux and UQLX, how do I increase the memory size?

You need to change the code where allocation occurs.

It occurs to me when I make this change software that uses the top 8 bits of the A? registers for flags will start to fail. I am assuming that case is actually quite rare in QDOS?

Derek_Stewart wrote:<>
Whats a Q80?

Shorthand for Q60 @ 80 MHz

Derek_Stewart wrote:The Vampire for the Amiga is over £400, only the A1200 version and the standalone version is available.

Even if the hardware could be made, the Vampire Core is closed source.

A better option would be the A500 PIStorm with a 68008 adpter, then the drivers to drive the PI....

All easy, just a bit of soldering for the hardware and typing for the software... LOL

These points have been addressed elsewhere in this thread, but feel free to carry on without me.

XorA wrote:

XorA wrote:

Derek_Stewart wrote: Hi,

I can only allocate maximum of 16Mb in sQLux and UQLX, how do I increase the memory size?

You need to change the code where allocation occurs.

It occurs to me when I make this change software that uses the top 8 bits of the A? registers for flags will start to fail. I am assuming that case is actually quite rare in QDOS?

Any mileage in making it an option which can be turned off for those cases? (Not knowing anything about sQLux this may not be possible, of course)

dilwyn wrote:

XorA wrote:

XorA wrote:
You need to change the code where allocation occurs.

It occurs to me when I make this change software that uses the top 8 bits of the A? registers for flags will start to fail. I am assuming that case is actually quite rare in QDOS?

Any mileage in making it an option which can be turned off for those cases? (Not knowing anything about sQLux this may not be possible, of course)

The answer is always yes, but obviously extra checks in rw operations will slow the operation down. Less noticable on my M1 device, more noticable on PiZero

XorA wrote:

dilwyn wrote:

XorA wrote:
It occurs to me when I make this change software that uses the top 8 bits of the A? registers for flags will start to fail. I am assuming that case is actually quite rare in QDOS?

Any mileage in making it an option which can be turned off for those cases? (Not knowing anything about sQLux this may not be possible, of course)

The answer is always yes, but obviously extra checks in rw operations will slow the operation down. Less noticable on my M1 device, more noticable on PiZero

Also is this a guilty admission Mr Dilwyn?

XorA wrote:It occurs to me when I make this change software that uses the top 8 bits of the A? registers for flags will start to fail. I am assuming that case is actually quite rare in QDOS?

I've known for years that only 24 bits of address were used, but it never occurred to me to use an address for 8 * 1 bit flags! At least, my software will work. Mind you, I haven't had any problems on QMSQ/E on QPC and I have 32 M RAM assigned. Which is 28 bits ($2,000,000) and so far, so god. Maybe SMSQ/E is better equipped/written to handle big RAM?

Cheers,
Norm.

NormanDunbar wrote:

XorA wrote:It occurs to me when I make this change software that uses the top 8 bits of the A? registers for flags will start to fail. I am assuming that case is actually quite rare in QDOS?

I've known for years that only 24 bits of address were used, but it never occurred to me to use an address for 8 * 1 bit flags! At least, my software will work. Mind you, I haven't had any problems on QMSQ/E on QPC and I have 32 M RAM assigned. Which is 28 bits ($2,000,000) and so far, so god. Maybe SMSQ/E is better equipped/written to handle big RAM?

It was a huge problem when Amiga went from 68000->68020 people suddenly discovered all the software that was doing this.

It is still a huge problem on ARM and x86 where the physical adress bus is only 48 or 52 bits. People "borrow" the extra bits for flags. Now on ARM at least those extra bits are used for security pointer tagging (in the architecture) so they are not spare. But that broke a lot of software!

As they still say "fool around and get found out!". Well, they are a bit less polite than me!

Cheers,
Norm.

XorA wrote:

XorA wrote:

dilwyn wrote:
Any mileage in making it an option which can be turned off for those cases? (Not knowing anything about sQLux this may not be possible, of course)

The answer is always yes, but obviously extra checks in rw operations will slow the operation down. Less noticable on my M1 device, more noticable on PiZero

Also is this a guilty admission Mr Dilwyn?

It wasn't intended as one, but now you mention it...
I'm a QPC2 man!