Timing on ROM expansion port / ROMOEH
Re: Timing on ROM expansion port / ROMOEH
So according to the datasheet for the 595 shift register - this does have a 3-state output control - the "G" input that tri states the output latches - so this could be tied to ROMOEH via an inverter and that would handle that side of things - but you are going to need a lot more electronics to control what you put into that register, and keep in mind that this signal would go high for all the lower 64K of ROM space in the QL - i.e. it would be active whenever the OS was being accessed as well - not just the upper 16K of ROM. The cartridge port can offer up all 64K of ROM space!
Re: Timing on ROM expansion port / ROMOEH
Other devices that have used the ROM port have used a multiple input (13 inputs for instance) NAND gate to select a particular port within the top of a 16K ROM space to handle an I/O register - but it's unclear from your post what your intention is.
Re: Timing on ROM expansion port / ROMOEH
thx Pr0f,
that was my next plan, wiring the shr OE to the ROMOE (inverted) to ensure not driving the bus when i shouldnt (i wanna definitely not damage something). and i need to be more selective (in hardware) so this only happens between c000 and ffff (gal or and, *mabye* the pic's clc because thats sort of a mini gal).
what i would like to achieve is (on the rom-port as a first try), besides learning, a serial communication beyond that 9600 baud, in my believe this is *the* major issue that could open up a wide variety of add-ons via some sort of companion systems (like a raspi). there might be something out there already (but i wanna get xp and like tinkering), and i currently assume that on the real expansion port it could be easier in terms of timing. but don't wanna give up the initial approach with the rom-port already.
that was my next plan, wiring the shr OE to the ROMOE (inverted) to ensure not driving the bus when i shouldnt (i wanna definitely not damage something). and i need to be more selective (in hardware) so this only happens between c000 and ffff (gal or and, *mabye* the pic's clc because thats sort of a mini gal).
what i would like to achieve is (on the rom-port as a first try), besides learning, a serial communication beyond that 9600 baud, in my believe this is *the* major issue that could open up a wide variety of add-ons via some sort of companion systems (like a raspi). there might be something out there already (but i wanna get xp and like tinkering), and i currently assume that on the real expansion port it could be easier in terms of timing. but don't wanna give up the initial approach with the rom-port already.