bwinkel67 wrote: ↑Wed Dec 28, 2022 12:27 am
David Karlin was actually asked this questions on one of the general tech QA forums, with similar sentiment that it wouldn't have cost extra. He said it would have been a significant increase and that Sinclair research, at the time, had gotten a huge discount on the 68008.
It is unlikely that discount was more than the costs of the coprocessor and second serial port. (The price for 68000 was certainly also negotiable.)
Frankly, Richard Altwasser's designs were just much more clever. And I don't think the QL hardware disaster would have happened with him still at Sinclair.
Derek_Stewart wrote: ↑Wed Dec 28, 2022 9:18 am
If there was an interface to fit a 68000 CPU in to 68008 socket, what problems would occur?
In a new design, where both DRAM and ROM are available in dual 8 bit banks anyway, it would simply be a waste of memory bandwidth to use an 8 bit data bus instead of 16 bit (except for I/O registers).
Peter wrote: ↑Wed Dec 28, 2022 1:04 pm
In a new design, where both DRAM and ROM are available in dual 8 bit banks anyway, it would simply be a waste of memory bandwidth to use an 8 bit data bus instead of 16 bit (except for I/O registers).
Sounds like this has already been done in the Gold Card, so I will stick to that.