Fun things to do with an MC68EC020....

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Paul
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Re: Fun things to do with an MC68EC020....

Post by Paul »

That's a really hard decision.
I prefer using larger CPLD with lots of io pins even when not neccessary.
It's really hard if you implemented 90% of the logic just to find out you are going to miss some macrocells or io pins.
Once everything is running I still can decide to use smaller devices.
Using very large chips will involve having the board soldered by factory because, other than for prototypes, soldering is consuming way to much time.
Kind regards Paul


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tofro
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Re: Fun things to do with an MC68EC020....

Post by tofro »

You might also want to consider PCB routing issues:

You'll be having up to 6 buses on your board (Address of different width, data of different width and control with some QL-specific signals, each both locally and towards the QL), depending on how far you want to be able to decouple your board's adressing from the QL's (in case you want, for example, re-map the QL's I/O somewhere up into your board's memory map or have more video memory because you want to implement private video circuitry or even "only" want to use a wider data bus on your board).

Depending on that decision, a CPLD that wants to handle both local tasks and the connection to the QL, that guy would need to be HUGE and routing the 6 buses around that guy might become a nightmare. One CPLD to handle board-local stuff and another one handling the QL as a peripheral might probably be easier. And smaller building blocks are always easier to debug, you could even run your board stand-alone with only the "local" CPLD (without video, then, of course - but you could always add a simple BDM connection).

Tobias

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Dave
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Re: Fun things to do with an MC68EC020....

Post by Dave »

We've been discussing it in terms of two sides of the CPU - expansion side (left side) and QL-side (right side), which is only the QL's unexpanded internal address space. The idea is to tri-state buffer well and often. ;)

The SRAM and expansion ports are left of CPU and will be buffered. The QL's address space will also be tri-state buffered, so we can logically disconnect the expansion from the QL most of the time, except for some Interrupts and writes in that space. There are a lot of conditions we need to test for, and way too much of it is timing critical. Nasta just gave me a REALLY great primer on how this will all work asynchronously.

I will be doing this as a 6-layer PCB in part for a nice clean design and in part because it will make hand layout of some areas a lot easier. I've set aside funds to pay for a half-eurocard sized PCB so there's room for two expansion connectors. This will be a quiet and well shielded card, until you plug something into it ;)


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Peter
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Re: Fun things to do with an MC68EC020....

Post by Peter »

Dave wrote:One of the discussions that's ongoing right now is, is it better to use a single larger CPLD for $9 or so, or two smaller CPLDs for $2.50 each?
Look at a Q60 board and you have the answer. ;)

The only avantage for the single large one is that you don't have to plan ahead.


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