Qubbide Extended drives
Posted: Fri Oct 13, 2017 1:07 pm
I've seen in the manual for Qubbide the mention of multiple Master drives upto 8 or 16 depending on where you read it. How is that done?
I have GAL equations for Qubbide - not sure which version, but these have the amendment for alternate status register - dated 1998 Jul 07.
Looking at the manual and the GAL logic - is it just a case of replicating the smaller GAL chip that carries the control signals for the 16 byte I/O area for each new Mater and additionally decoding out A7-A4 for each of Drive selectors - and leaving the original GAL logic intact to drive the latches ?
Basically replicating this equation with more address lines in the 2nd GAL:
/* GAL1 is selected in the last 256 bytes */
SEL = A13 & A12 & A11 & A10 & A9 & A8 & !ENL;
e.g.
SEL0 = A13 & A12 & A11 & A10 & A9 & A8 & !A7 & !A6 & !A5 & !A4 & !ENL;
SEL1 = A13 & A12 & A11 & A10 & A9 & A8 & !A7 & !A6 & !A5 & A4 & !ENL;
...
and so on, changing the logic selection levels for A7-A4 for each Master drive select ?
I have GAL equations for Qubbide - not sure which version, but these have the amendment for alternate status register - dated 1998 Jul 07.
Looking at the manual and the GAL logic - is it just a case of replicating the smaller GAL chip that carries the control signals for the 16 byte I/O area for each new Mater and additionally decoding out A7-A4 for each of Drive selectors - and leaving the original GAL logic intact to drive the latches ?
Basically replicating this equation with more address lines in the 2nd GAL:
/* GAL1 is selected in the last 256 bytes */
SEL = A13 & A12 & A11 & A10 & A9 & A8 & !ENL;
e.g.
SEL0 = A13 & A12 & A11 & A10 & A9 & A8 & !A7 & !A6 & !A5 & !A4 & !ENL;
SEL1 = A13 & A12 & A11 & A10 & A9 & A8 & !A7 & !A6 & !A5 & A4 & !ENL;
...
and so on, changing the logic selection levels for A7-A4 for each Master drive select ?