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Discussion about connecting RASPI to QL

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Timbucus
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Re: Discussion about connecting RASPI to QL

Postby Timbucus » Thu May 18, 2017 12:17 am

Interesting you chose the full size PI rather than the smaller rPI0w is that so that you have the Ethernet port (rather than just WiFi) and slightly more power in the CPU?

I agree with the idea of a mini backplane just need to leave physical room for the IDE cable to be plugged in and out so the PO is not too tight to the case.

Sounds like an exciting project - Looking forward to owning one!

Tim


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Dave
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Re: Discussion about connecting RASPI to QL

Postby Dave » Thu May 18, 2017 12:25 am

The Pi Zero, either version, can be used. However, it's slower, single core, only has 512MB, and runs GPIO at about 1/3rd the speed of a Pi3. It also only has 1/8th the video prowess of the Pi3.

So yes, a Pi Zero can be used. It's pretty good for 5 bucks.


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QuantumLeapGR
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Re: Discussion about connecting RASPI to QL

Postby QuantumLeapGR » Thu May 18, 2017 10:20 am

Dave wrote:One thing this DOES allow is the Pi to operate the bus and snoop the QL IO area. It could read keyboard inputs, and read/write the microdrives, use the serial ports, etc. It could run uQLx, and use the QL's hardware as an accessory. It would be by far the most powerful BBQL ;)


And why not completely forgo this and use the RasPI inside the QL case, then use the GPIO pins to interface the keyboard and use the GPIO matrix keyboard driver? (I know it's not as much fun) but it's a good alternative to create a super powerful QL.
BTW: The TK-PIE "Bare Metal OS" can be used as a server for many things as long as you write all the graphics routines on it. This will require minimal intervention on the QL side other than making sure that at least for GFX and sound the relevant info is transferred over to the PI then this would take over.


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tofro
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Re: Discussion about connecting RASPI to QL

Postby tofro » Thu May 18, 2017 10:36 am

QuantumLeapGR wrote:
Dave wrote:and why not completely forgo this and use the RasPI inside the QL case, then use the GPIO pins to interface the keyboard and use the GPIO matrix keyboard driver? (I know it's not as much fun) but it's a good alternative to create a super powerful QL.

Because then it's no longer a QL. Some people (including me) are a bit picky on this ;)

Tobias


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QuantumLeapGR
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Re: Discussion about connecting RASPI to QL

Postby QuantumLeapGR » Thu May 18, 2017 11:09 am

tofro wrote:
QuantumLeapGR wrote:
Dave wrote:and why not completely forgo this and use the RasPI inside the QL case, then use the GPIO pins to interface the keyboard and use the GPIO matrix keyboard driver? (I know it's not as much fun) but it's a good alternative to create a super powerful QL.

Because then it's no longer a QL. Some people (including me) are a bit picky on this ;)

Tobias


Granted, you're right :) (Still want to make that thing though)


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Derek_Stewart
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Re: Discussion about connecting RASPI to QL

Postby Derek_Stewart » Thu May 18, 2017 11:36 am

Hi,

I suppose the QL operating System could ported over the TK-PIE OS and run on the PI Bare Metal. But this maybe another emulator...


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Derek
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QuantumLeapGR
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Re: Discussion about connecting RASPI to QL

Postby QuantumLeapGR » Thu May 18, 2017 3:32 pm

Derek_Stewart wrote:Hi,

I suppose the QL operating System could ported over the TK-PIE OS and run on the PI Bare Metal. But this maybe another emulator...


No; it's a completely different paradigm. The TK-PIE OS serves only as a place to implement hardware response to signals sent over to the GPIO.


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Dave
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Re: Discussion about connecting RASPI to QL

Postby Dave » Mon May 22, 2017 1:10 am

Dave wrote:
Paul wrote:As the GPIO is 3.3V and QL is 5V some interfacing has to take place.
For Example by using 74LVX245 ICs. Thats why I am so keen on any Information about buffered QL backplanes.
It's not easy to figure out the possible ways how the bus can be used (directionwise) because I guess while "normal" Adress lines are only read from BUS when using the expansion Slot this will change in case a GC or SGC will be used behind the Buffer.
Kind regards Paul


With the R/W pin there it makes direction control easy. I personally prefer the TXB0108 because of the flexibility it provides (one PCB and Pi you can decide which GPIO are inputs or outputs and change them on the fly) but it is a bit pricy - $1.14 instead of $0.64 each. However, when only using 3 or 4 and having a very small run design like this, I think it's worth the extra expense. The TXB also performs better in this application.

If we treat this as a QL expansion device and give it a 16k decoded block, that would certainly increase options and make it a lot more flexible. If someone wants to do a simple GAL decoder and I focus on the PCB design?

My instinct is to make it a card that site the Pi just outside the QL, with ethernet and USB facing back and just hung off the edge of the card so you can use the usual spacers to mount the Pi securely. Do you want to be able to choose which GPIO go where, or is there a consensus of maybe....

8 bits data bus, 8 bits address bus (giving 256 byte addressable range), device select from address decoder, R/W line, room for 6 more GPIOs with 3x TXB0108 or all the remaining GPIO with 4x TXBs. Do you want a little thru-hole work area to maybe at sensors? Or bring out the SPI ports? Any other requests before I do a V1 of this?


I've been doing some work on this PCB. I really need a decision if you favor the 74LVX245 and doing direction control, or going with the TXB0108 and having that be automatic. Also, any volunteers to do a simple GAL? With a bit of help on this I could be testing this next week.


Paul
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Re: Discussion about connecting RASPI to QL

Postby Paul » Mon May 22, 2017 7:09 am

I definitely prefer the 74LVX245 version. And I could try the GAL equations. But I am not very good at these.
This would be some practice for me.
Kind regards
Paul


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Dave
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Re: Discussion about connecting RASPI to QL

Postby Dave » Tue May 23, 2017 7:57 pm

Ok. I've worked it around the 74LVX245.

Proposal:

Code: Select all

IC1: GAL16V8
IC2: 74LVX245 for D0:7
IC3: 74LVX245 for A0:7
IC4: 74LVX245 for A8:13    ** A0:13 provides 16K addressable area, like any expansion.
                           ** /SEL select from GAL pin 17
                           ** R/W from GAL pin 16 to Pi
IC5: 74LVX245              ** You pick 8 other lines from MCU.


Direction control for D0:7 is wired from pin 19 of a GAL16V8 to pin 1 of IC2.
/OE is pin 18 of GAL to pin 19 of IC2.

IC3/4 direction control tied MCU->Pi by tying pin1 to GND (direction B to A)
/OE is pin 18 of GAL to pins 19 on IC3/4.

Code: Select all

GAL16V8
1  ASL[2]        20 Vcc
2  A19           19 IC2 direction, high Pi to MCU, low MCU to Pi
3  A18           18 /OE for buffers, active low. Keep HIGH unless selected
4  A17           17 /SEL for Pi [1]
5  A16           16 R/W (write active low) to Pi
6  A15           15
7  A14           14
8                13
9  RDWL          12
10 GND           11


It might be fun to bring CLK through, because if the Pi can tell the clock speed of the CPU it is connected to it can infer details of the system it is working with. Your call.

[1] /SEL and /OE appear to be identical, but there may be timing issues. If there are, this gives flexibility to resolve.
[2] I've brought the Address strobe to the GAL clock input, it is a line you might want to pass to the Pi too or instead?

If you have additions, corrections or etc, please let me know. I'd like to etch and test one then get the PCBs ordered.



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