The Sinclair QL Forum

Critical signals (that are used as qualifiers for other signals, i.e. to latch them) could be buffered by a HCMOS buffer which has 1/3 - 2/3 Vcc tresholds for logic zero and 1. Something like a HC244 also has a narrow schmitt characteristic which could help.

The keyboard is an 8x8 matrix as described in the details of the KEYROW superbasic function. The actual connections of the membrane have more pins in order to simplify the routing of the lines in the membrane. In principle there are 2 ways hardware can be implemented to emulate a keyboard. One is to...

Regarding a SRAM internal expansion: Two such RAM chips (if a PCB was made, a SMD case would be perfect for small size) or even one larger 1Mx8 chip (they do exist but are quite difficult to find), can be used to make a very clever and fast RAM expansion similar to the Trumpcard (but without the flo...

I'm afraid the QL wouldn't even run in case of overlapping memory expansions. It depends to an extent on how the memory is implemented, but in fact it will work because both RAMs get the same data written to and read from, but there will be partial contention on the bus and of course it will not be...

The SGC requires the synch signals (VSYNCH and CSYNCHL) from the expansion bus connector. These are actually directly connected from the video out connector. There are many varieties of SCART connections as it's a multi-purpose connector with many signals. Based on your description I would say thet ...

I've had a short time to look into the bus ownership arbitration implemented on the 020, and sadly it makes setting up two CPUs to use the same bus quite complicated, and impractical. The issue is that the 020, like it's predecessors, expects to implicitly own the bus initially, and an external devi...

Once again Nasta knocks it out of the park :) Well, I am aware that lots of stuff in the messages above sounds like tooting my own horn rather without foundation as it's about a product that never materialized. I wish I had more time to do things QL, but life is what it is, so at least I tried to d...

Now, a finer point on this is that tasks are NOT jobs. This is one definition that appears no-where in the QDOS/SMSQ documantation, assuming the difference is known. Unfortunately, the distinction pretty much vanished early on in the life of the QL largely through terminology used in DP's BASIC com...

Finally, there is the most 'out there' fetaure of the GF - the second CPU. One could rightly say there is a huge problem getting the programming done for the first one, let alone for the second. But, the potential offered is very high for the price of another CPU socket and some PCB routing. The bas...

You also need to check for aliases. Aliases are cases where the same physical RAM appears in multiple places in the address map. This will happen when the RAM is only partially decoded (see below) or address bits are stuck to a certain value, just like data bits can be. In this case the actual physi...